14-15 November 2018
|European Case Law Identifier:||ECLI:EP:BA:2005:T076702.20050601|
|Date of decision:||01 June 2005|
|Case number:||T 0767/02|
|IPC class:||H01L 21/20|
|Language of proceedings:||EN|
|Download and more information:||
|Title of application:||Process for fabricating a semiconductor crystallized layer and process for fabricating a semiconductor device using the same|
|Applicant name:||SEMICONDUCTOR ENERGY LABORATORY CO., LTD.|
|Relevant legal provisions:||
|Keywords:||Inventive step (no)|
Summary of Facts and Submissions
I. This is an appeal from the refusal by the examining division of European patent application No. 94. 101 571.1 for lack of inventive step (Article 56 EPC).
II. In response to a communication from the board the appellant filed amended claims with a letter dated 24 April 2005.
Claim 1 is now worded as follows:
"A method of manufacturing a semiconductor device comprising:
disposing as a substrate a semiconductor film made of silicon in contact with a metallic catalyst for promoting a crystallization of said semiconductor film; and
crystallizing said semiconductor film provided with said metallic catalyst by heating;
characterized by introducing phosphorus ions into a selected portion of the crystallized film after the crystallizing step;
annealing said crystallized film with said phosphorus ions introduced thereon."
Claims 2 to 14 are dependent on claim 1
III. The following prior art documents were cited inter alia in the examination procedure:
D1: US 5 147 826 A
D4: Patent Abstracts of Japan, vol. 16, no. 59 (E-1166), 14 February 1992 & JP 03 257818 A
The following postpublished document was submitted by the appellant with the statement of grounds of appeal:
D6: US 5 275 851 A
An English translation of document D4 (D4a) was sent to the appellant with the summons to oral proceedings.
IV. The appellant argued essentially as follows:
- Document D1, the closest state of the art, relates to the selective crystallization of an amorphous silicon (a-Si) film at lower annealing temperatures and shorter annealing times than previously possible. This is accomplished by depositing an ultra thin metallic layer as crystallizing promoting catalyst on the a-Si film. Although document D1 discloses that the doping of the Si film can be done during or after its deposition on the substrate, the crystallizing heat treatment is always done after the film has been doped. This avoids two separate thermal treatments, one for activating the dopant and another for crystallizing the film. There is no suggestion in document D1 to perform a thermal treatment after crystallization of the Si film. The use of a single heat treatment step for activating and crystallizing is also disclosed in document D6, which has the same authors as document D1, (cf D6, column 3, lines 21 to 27). This shows that this manner of manufacturing a semiconductor device was still followed well after the priority date of the present application.
- The present application on the other hand discloses introducing the phosphorus ions into the already crystallized film and performing the activation annealing afterwards. The inventors have recognized that doping the Si film prior to its crystallization is detrimental to the film properties, since the phosphorus atoms have a gettering effect on the crystallization promoting catalyst and their presence therefore alters the distribution of metal catalyst during the crystallization treatment. By introducing the phosphorus ions after the crystallization annealing, the distribution of the metal catalyst is not perturbed. Moreover, the second thermal treatment for activating the dopant removes the catalyst from the crystallized regions due to the gettering effect of the phosphorus ions. This is a further advantage, as the metal agent used as catalyst often has detrimental effects on the performance of the semiconductor device.
- Although document D4 discloses implanting the source and drain regions of a thin film transistor (TFT) after the crystallization of an a-Si film, no reasons for doing so are disclosed. The method of document D4 comprises a plasma pre-treatment step of the substrate prior to the deposition of the a-Si film. The pre-treatment creates nucleation sites from which the crystallization of the a-Si film proceeds. As a plasma pre-treatment step is completely different from employing a metal catalyst, the problems and advantages related to a metal catalyst cannot be derived from document D4.
V. The appellant requests that the decision under appeal be set aside and that a patent be granted with the claims filed with the letter of 24 April 2005.
Reasons for the Decision
1. The appeal is admissible.
2. Inventive step (Article 56 EPC)
The only issue in this appeal is that of inventive step.
2.1 The present application relates to the crystallization of a-Si thin films into polycrystalline films at a temperature of about 550°C and for annealing times of the order of some hours. This allows firstly the use of large area inexpensive glass instead of quartz as substrate material and secondly increase of the product yield (cf column 1, line 28 to column 2, line 21). The presence of a metallic catalyst in contact with the a- Si film accelerates the crystallization of the film and reduces the temperature required for crystallization by facilitating the initial crystal nucleation process (cf column 5, lines 55 to 56).
In the embodiments described in examples 3, 4 and 6 a semiconductor device is obtained by doping selected regions of the crystallized Si film with phosphorus and boron atoms to form N-type and P-type regions. A further annealing step is carried out to activate the impurities (cf column 13, line 56 to column 14, line 10; column 15, lines 20 to 31 and column 20, lines 24 to 37).
No reason other than the activation of the impurities is given in the application for carrying out the second annealing treatment after the Si film has been crystallized. In particular, there is no mention of a gettering effect of the phosphorus ions on the metal catalyst.
2.2 The board agrees with the appellant that document D1 represents the closest prior art. This document addresses the same technical problem as the present application, viz crystallizing an a-Si film at a lower temperature and in a shorter time than previously possible. In the method disclosed in document D1, a metal catalyst is deposited in a pattern on the a-Si film prior to rapid thermal anneal. This has the effect of accelerating the crystallization of the a-Si beneath the deposited pattern. Although document D1 discloses the crystallization of doped and undoped films, ie films which were doped during or after the deposition step and films which remained undoped, all the examples concerning doped films disclose that the crystallization thermal treatment is performed after the doping of the film (cf column 5, lines 29 to 60). The activation of the dopants and the crystallization of the a-Si film is therefore done in the same rapid thermal annealing step.
2.3 The method of claim 1 differs therefore from the method disclosed in document D1 in that the doping of the phosphorus atoms and the activation anneal is done after the crystallizing step.
2.4 This difference, however, has undisputedly no effect on the temperature and duration of the crystallizing procedure, ie the technical problem addressed by the originally filed application.
2.5 It is established jurisprudence that when the subjective technical problem originally stated in the application turns out to have been rendered inappropriate by closer prior art, the problem addressed by the application may be reformulated as a new objective technical problem. To this effect, the technical effects achieved by the claimed invention when compared to the (new) closest prior art are assessed to define the new objective technical problem.
It is also established jurisprudence that such a reformulation can be allowed provided the skilled person would recognise the same as implied or related to the problem initially proposed (cf T 184/82, OJ 1984, 261) and that the new problem could be deduced by the skilled person from the application as filed when compared to the closest prior art (cf T 344/89 and T 386/89, both unpublished).
2.6 Here the appellant has alleged that the phosphorus ions have a gettering effect on the metal catalyst. The doping of the Si-film and the activation anneal have therefore to be done after the film has been crystallized, as the presence of the phosphorus ions would otherwise alter the distribution of the metal catalyst and disturb the crystallization of the Si-film. Moreover, carrying out the doping and activation anneal once the Si-film has been crystallized has the further advantage that the metal catalyst is effectively removed from the crystallized regions by the gettering effect of the phosphorus atoms.
2.7 It has thus to be considered if the alleged effect now adduced by the appellant can be taken into account when formulating the objective technical problem, having regard to the principles set out above.
The gettering effect alleged by the appellant is however undisputedly not explicitly disclosed by the application documents as originally filed. The embodiments concerning the manufacturing of a semiconductor device merely state that the doping and activation anneal were done after the crystallizing thermal treatment without disclosing any reasons for doing so.
Nor does a comparison between the application and the closest prior art D1 enable the skilled person to deduce the alleged effect, as information on the quality of the crystalline Si-films and the distribution of the metal catalyst is not disclosed in either of them.
Neither is the problem initially suggested in the application, viz to reduce the temperature and duration of the thermal treatment required for crystallizing the a-Si film, related to the effect alleged by the appellant, which concerns the quality and homogeneity of the crystalline Si film and/or of the finished semiconductor device.
It follows that the gettering effect of the phosphorus ions cannot be taken into account when formulating the objective technical problem.
2.8 No objective technical problem can be derived from the application as filed when comparing the claimed manufacturing method with the one disclosed in document D1 other than that of providing an alternative to the conventional method - the alternative consisting in effecting the doping of the phosphorus ions and the activation anneal after the crystallizing step of the a-Si film.
2.9 Document D4a is also concerned with crystallizing an a- Si film at lower temperatures and shorter times than previously available. It discloses performing a plasma pre-treatment of the substrate on which an a-Si film is to be deposited. The plasma pre-treatment creates nucleation sites on the glass substrate from which the crystallization of the Si film proceeds during the thermal anneal. The plasma pre-treatment acts therefore as a crystallizing promoting catalyst. After the Si film has been crystallized the source and drain regions of a transistor are formed by implanting phosphorus ions, although no reasons for implanting the source and drain regions after the crystallizing steps are disclosed (cf page 7 and Figure 1).
A further activation anneal of the dopants is the standard practice in the field of manufacturing semiconductor devices and is therefore implicitly disclosed by document D4. This has not been contested by the appellant.
2.10 Both alternatives of doping the Si film before or after the crystallizing step were therefore disclosed in the state of the art and available to the skilled person. Although document D6, introduced by the appellant, specifically discloses crystallizing the Si film and activating the dopants in a single thermal treatment (cf column 3, lines 24 to 27), it is not, in the judgement of the board, evidence of a prejudice in the art at the priority date of the application against doing otherwise.
Moreover, according to the appellant, the gettering effect of the phosphorus ions was not known previously. A skilled person would therefore have considered the alternatives disclosed in document D1 and D4a as equally suitable for manufacturing a semiconductor device. Although doping the Si film prior to its crystallization has the benefit of avoiding a process step, it has the drawback that the temperature and duration of both anneals, ie crystallization and impurity activation, cannot be controlled independently. Consequently, the skilled person would choose the most suitable alternative according to the circumstances.
2.11 For these reasons the board judges that the method of manufacturing a semiconductor device specified in claim 1 does not involve an inventive step in the sense of Article 56 EPC.
For these reasons it is decided that:
The appeal is dismissed.