T 0878/02 () of 11.2.2004

European Case Law Identifier: ECLI:EP:BA:2004:T087802.20040211
Date of decision: 11 February 2004
Case number: T 0878/02
Application number: 96101230.9
IPC class: H01L 23/66
Language of proceedings: EN
Distribution: C
Download and more information:
Decision text in EN (PDF, 45.656K)
Documentation of the appeal procedure can be found in the Register
Bibliographic information is available in: EN
Versions: Unpublished
Title of application: Microwave monolithic integrated circuit package with improved RF ports
Applicant name: Hughes Electronics Corporation
Opponent name: -
Board: 3.4.03
Headnote: -
Relevant legal provisions:
European Patent Convention 1973 Art 56
European Patent Convention 1973 Art 123(1)
Keywords: Inventive step - no (main request, 1st to 5th auxiliary requests)
Amendment - subject-matter not contained in application as filed (4th and 5th auxiliary request)
Catchwords:

-

Cited decisions:
-
Citing decisions:
-

Summary of Facts and Submissions

I. This is an appeal from the decision of the examining division, posted 15 February 2002, to refuse European patent application No. 96101230 for lack of an inventive step with respect to the following prior art document

D3: US-A-4 881 116

when considered in the light of the skilled person's general knowledge as exemplified, inter alia, by the following document

D1: US-A-4 901 041.

The decision also refers to the following document

D2: US-A-5 140 407

but merely in a passing reference.

II. The notice of appeal was filed on 26 April 2002, and the appeal fee was paid on the same day. The statement of the grounds of appeal was filed on 25 June 2002, together with a new main request consisting of a complete set of description, claims and drawings, and an auxiliary request with the same description and drawings but different claims.

III. In a written communication dispatched on 10 November 2003 accompanying the summons to oral proceedings, the Board expressed the preliminary view that neither the main request nor the auxiliary request satisfied the requirements of the EPC. In particular, the Board considered the main request and the auxiliary request to contravene the provisions of Article 123(2) EPC because there appeared to be no basis in the application for broadening the disclosure of the specific dimensions of the transmission line sections described with reference to the drawings into the claimed generalised relationships between those dimensions.

In addition, the Board expressed the view that even if these objections were overcome, the inventions claimed in claim 1 of the main request and in claim 1 of the auxiliary request, respectively, lacked an inventive step in view of the combined teachings of documents D3 and D1.

IV. On 12 January 2004 the appellant filed a response to the Board's written communication. The main request was replaced by a revised main request with a revised set of claims, a newly filed description consisting of the pages 1, 2, and 4 to 14. as originally filed and of pages 3, 3a and 3b as filed on 19. March 2001, and a newly filed set of drawings corresponding to the drawings as originally filed. The previous auxiliary request was replaced by a first auxiliary request containing revised claims, and new auxiliary requests 2 to 5. The auxiliary requests had the same description and drawings as the main request.

V. At the oral proceedings held on 11 February 2004, the appellant replaced the first auxiliary request with a new first auxiliary request with revised claims. The main request and the auxiliary requests 2 to 5 were maintained as previously filed.

VI. Claim 1 of the main request, with paragraph identifiers (a) to (n) added by the Board to facilitate its discussion, has the following wording:

"1. A high frequency integrated circuit die package comprising:

(a) an electrically conductive base (10),

(b) a dielectric substrate (12) having an opening (14) therein, the lower surface of the substrate (12) being positioned on the upper surface of the base (10),

(c) a package wall section (20) bonded to the upper side of the substrate (12) and circumscribing said opening (14),

(d) the package wall section (20) having an opening (46) larger than the opening (14) in the substrate (12) and has cutout portions (50, 52, 54, 56) so as to leave exposed substrate areas both on the inner and outer side of the wall section (20),

(e) a die (16) mounted within said substrate opening (14) and having a plurality of connecting pads (17),

(f) a lid (26) bonded to upper side of the wall section (20), and

(g) a plurality of conductive traces (36a-36j, 40, 42) formed on said dielectric substrate (12), positioned between a portion of said substrate (12) and said wall section (20), and extending on exposed substrate areas both on the inner and outer side of the wall section (20),

(h) some of said traces (36a-36j) forming a low frequency input/output transmission line having each a series connected outer trace section, a middle trace section, and an inner trace section,

(i) some of said traces (40, 42) forming part of a high frequency input/output transmission line having each a series connected microstrip line section (39a), a shielded strip line section (39b), and a capacitor section (39c),

(j) each of said micro strip line sections (39a) comprising a microstrip line trace section (40a),

(k) each of said shielded micro strip line sections (39b) comprising a shielded strip line trace section (40b), and

(l) each of said capacitor sections (39c) comprising a capacitor trace section (40c) and being electrically connected to one of said connecting pads (21) of said die (16), wherein

(m) the width of said middle trace section of each of said low frequency input/output transmission lines is mainly equal to the width of said outer trace section of each of said low frequency input/output transmission lines; and

(n) the width of the shielded strip line trace section (40b) of each of said high frequency input/output transmission lines is smaller than the width of each of said microstrip trace sections (40a) and each of said capacitor trace sections (40c)."

VII. Claim 1 of the first auxiliary request differs from claim 1 of the main request in that the claim now refers to a "high frequency integrated circuit die Ka-band package", and in that paragraphs (m) and (n) of the main request are deleted and replaced by paragraphs (m') to (q'), the paragraph identifiers having been added by the Board:

"(m') wherein said capacitor section (40c), said microstrip line section (40a), and said shielded strip line section (40b) are all formed at least in part by a single continuous trace deposited on said substrate, and wherein said capacitor section that defines said capacitor has a length that is less than the length of said microstrip line section,

(n') wherein said capacitor trace section (40c) of said input/output transmission line has a width not more than half the length of said microstrip line trace section (40a) of said input/output transmission line

(o') wherein said wall section (12) includes a rail (62) that covers the shielded strip line section (39b) of said input/output transmission line (40), said shielded strip line section (39b) comprising a layer of tungsten (40b), and said capacitor section (39c) and said microstrip line section (39a) each comprising successive layers of tungsten, nickel and gold,

(p') wherein said capacitor trace section (40c) has a length that is less than the width of said microstrip line trace section (40a) and wherein capacitor trace section (40c) cooperates with an adjacent portion of said base and an interposed portion of said substrate to define a high frequency capacitor that controls impedance of said input/output transmission line,

(q') and wherein the transition between said microstrip line trace section (40a) and said shielded strip line trace section line (40b) and between said shielded strip line trace section (40b) and said capacitor trace section 40(c) is a tapered transition."

VIII. Claim 1 of the second auxiliary request differs from claim 1 of the main request in that paragraphs (m) and (n) of the latter are deleted and replaced by the following text, the paragraph identifier (r')having been added by the Board,

(r') "the transition between the microstrip line trace section (40a) and the shielded strip line trace section (40b), and between the shielded strip line trace section (40b) and the capacitor trace section (40c) respectively is a tapered transition."

IX. Claim 1 of the third auxiliary request differs from claim 1 of the main request by the addition of the following text at the end of paragraph (n) of the latter, with the text of paragraph (r') (the paragraph identifier having been added by the Board) being the same as the text of paragraph (r') of the second auxiliary request:

"and

(r') the transition between the microstrip line trace section (40a) and the shielded strip line trace section (40b), and between the shielded strip line trace section (40b) and the capacitor trace section (40c) respectively is a tapered transition."

X. Claim 1 of the fourth auxiliary request differs from claim 1 of the main request by the addition, after paragraph (n) of the main request, of the following of text (the paragraph identifier having been added by the Board)

(s') "each of said cutout portions (50, 52, 54, 56) exposes at least two of said low frequency input/output transmission lines (36a-36j)."

XI. Claim 1 of the fifth auxiliary request differs from claim 1 of the main request

(a) by the deletion of paragraph (i) and its replacement with paragraph (i') having the following text (the paragraph identifier having been added by the Board)

(i') "some of said traces (40, 42) forming part of a high frequency input/output transmission line having each a series connected microstrip line trace section (40a), a shielded strip line trace section (40b), and a capacitor trace section (40c),"

(specifically, the references to "microstrip line section (39a)", "shielded strip line section (39b)" and "capacitor section (39c)" in paragraph (i) have been replaced by references to "microstrip line trace section (40a)", "shielded strip line trace section (40b)" and "capacitor trace section (40c)", respectively),

(b) by the deletion of paragraphs (j) to (n), and

(c) by the addition at the end of the modified paragraph (i') of the following text (which corresponds to paragraph q' of the first auxiliary request:

"wherein the transition between said microstrip line trace section (40a) and said shielded strip line trace section (40b) and between said shielded strip line trace section (40b) and said capacitor trace section 40(c) is a tapered transition."

XII. The appellant's arguments can be summarized as follows.

In high frequency integrated circuit die packages designed for use at extremely high frequencies up to 40 GHz, the configuration of signal transmission lines is dictated by frequency considerations, while in the case of the power lines physical parameters such as resistance need to be taken into account.

The idea underlying the invention is that the power lines and the signal carrying leads can be optimized independently, even though the claimed features are necessarily interdependent to some extent. In contrast, if as in the prior art just one type of lead is used for both purposes, that type of lead would be optimised either for the high frequency range or the zero- frequency range; any compromise solution would result in the lead being optimised for neither range.

The appellant emphasised the importance of the tapered transitions in the signal carrying leads between the ends of the shielded strip line trace section and the microstrip line trace section and the capacitor trace section respectively, which serve to avoid abrupt changes in the dimensions of the transmission line and the signal reflections engendered by such changes.

Reasons for the Decision

1. The appeal is admissible.

The Main request and the third auxiliary request

2. Inventive step

2.1. The invention claimed in claim 1 of the main request and in claim 1 of the third auxiliary request, in each case the only independent claim, relates to a high frequency integrated circuit die package. Claim 1 of the third auxiliary request includes all of the features of claim 1 of the main request, but requires in addition that tapered transitions are formed between, on the one hand, the shielded strip line trace section (40b) and, on the other hand, the microstrip line trace section (40a) and the capacitor trace section (40c), respectively. The following discussion as to whether the invention as claimed involves an inventive step in relation to claim 1 of the third auxiliary request applies therefore equally to claim 1 of the main request.

2.2. The nearest prior art document is document D3.

2.2.1. In the words of claim 1 of the third auxiliary request and with the reference numerals referring to the drawings in document D3, document D3 discloses a high frequency integrated circuit die package with has all of the following features of claim 1:

(a) an electrically conductive base (11),

(b) a dielectric substrate (12) having an opening therein, the lower surface of the substrate (12) being positioned on the upper surface of the base (11),

(c) a package wall section (13) bonded to the upper side of the substrate (12) and circumscribing said opening,

(d) the package wall section (13) having an opening larger than the opening in the substrate (12)

(e) a die (1) mounted within said substrate opening and having a plurality of connecting pads,

(f) a lid (22) bonded to the upper side (17) of the wall section (13), and

(g) a plurality of conductive traces (14, 15, 16) formed on said dielectric substrate (12) positioned between a portion of said substrate (12) and said wall section (13), and extending on exposed substrate areas both on the inner (16) and outer (15) side of the wall section (13),

(h) some of said traces (14, 15, 16) forming a low frequency input/output transmission line having each a series connected outer trace section (15, 14), a middle trace section (15), and an inner trace section (15, 16),

(i) some of said traces (14, 15, 16) forming part of a high frequency input/output transmission line having each a series connected microstrip line section (15, 14), a shielded strip line section (15), and a capacitor section (15, 16),

(j) each of said micro strip line sections ((15, 14) comprising a microstrip line trace section,

(k) each of said shielded micro strip line sections (15) comprising a shielded strip line trace section,

(l) each of said capacitor sections (15, 16) comprising a capacitor trace section and being electrically connected (61) to one of said connecting pads of said die (1), wherein

(m) the width of said middle trace section of each of said low frequency input/output transmission lines is mainly equal to the width of said outer trace section of each of said low frequency input/output transmission lines.

2.2.2. Just as in the application in suit, the importance of impedance matching is also discussed in document D3 as is the adverse effect if impedances are mismatched (e.g., document D3, column 1, lines 58 to 63).

2.3. The only differences between the high frequency integrated circuit die package claimed in claim 1 of the third auxiliary request and the high frequency integrated circuit die package disclosed in the prior art document D3 are therefore that claim 1 of the auxiliary request additionally requires:

that the package wall section has cutout portions (50, 52, 54, 56) so as to leave exposed substrate areas both on the inner and outer side of the wall section (20) (from paragraph (d) of the claim - see Section VI above).

that the width of the shielded strip line section of each of said high frequency input/output transmission lines is smaller than the width of each of said microstrip trace sections and each of said capacitor trace sections (paragraph (n) of the claim - see Section VI above)),

that the transition between the microstrip line trace section and the shielded strip line trace section, and between the shielded strip line trace section and the capacitor trace section respectively is a tapered transition, (see paragraph (r') - see Section IX above).

2.4. These differences between the claimed invention and the prior art define the objective problem to be addressed by the invention as the further improvement of impedance matching in order to permit operation of the circuit at higher frequencies.

2.5. Document D1 discloses feedthrough portions - which correspond to the shielded strip line section of claim 1 - of the signal transmission lines which are narrowed for the purpose of matching the impedance of the circuit to that of the adjacent parts of the transmission line. The metallisation forming the feedthrough is narrowed or "necked down" when it passes below the second dielectric layer 18 (document D1, column 2, lines 61 to 64 and Figure 1). The Board considers that given this teaching it would be obvious for the skilled person to complement the features known from document D3 by modifying the shielded strip line section, that is, the section of the transmission line which is sandwiched between the ceramic substrate and the wall structure, to be narrower than the adjoining transmission line sections in order to obtain better impedance matching.

2.6. The Appellant argued that the tapering of the transitions at either end of the shielded strip line section was an important feature of the claimed invention. However, given that it is known already from the closest prior art document D3 (column 1 lines 58 to 63) that discontinuities in the transmission line can lead to an impedance mismatch, it is the Board's view that the skilled person would from a consideration of first principles contemplate making transitions between sections of the transmission of different widths less abrupt where required to further minimise impedance mismatch. The Board therefore concludes that the feature of providing tapered transitions at either end of the shielded strip line section constitutes an obvious measure.

2.7. Unlike the high frequency integrated circuit die package disclosed in document D3, the high frequency integrated circuit die package as claimed requires also that the package wall section has cutout portions (50, 52, 54, 56) so as to leave exposed substrate areas both on the inner and outer side of the wall section (20) (paragraph (d) of the claim). In contrast, in document D3 the wall section is set back everywhere from the edge of the dielectric substrate. The appellant has not argued for and the Board does not ascribe any significance to this feature which is merely a design choice and does not make any inventive contribution to the claimed device. Thus, as argued by the examining division (decision, page 11, first paragraph), the skilled person would, where the mechanical rigidity of the whole package required a greater depth of the wall section, provide cutout portions limited to those areas where it is necessary to provide contact to the transmission lines.

2.8. Document D1 further discloses that improved impedance matching for signal feedthroughs in high frequency integrated circuit die packages can be achieved with the aid of circuit modelling (column 3, lines 42 to 56; with reference to the equivalent electrical circuit of Figure 4, column 3 line 65 to column 4, line 25). According to document D1, an electrical model for the desired feedthrough is established (document D1, column 3, lines 42 to 45) in the following manner. Starting from an existing feedthrough, an equivalent electrical circuit is determined, the specific component values of which "are adjusted to achieve desired electrical characteristics" (column 3, lines 42 to 53). The equivalent circuit that achieves the desired electrical characteristics "becomes the basis for physical manifestation in a new feedthrough design" (document D1, column 3, lines 54 to 56).

2.9. The appellant argued that an important difference between the claimed invention and the prior art lies in the provision in the former of two different types of traces, one kind for signal transmission, the other for power supplies and the like, while the prior art showed only one type of transmission line. As stated by the examining division and commented upon by the appellant (statement of the grounds of appeal, point 2.3(b), third paragraph), document D3 explicitly refers to both power lines and signal lines (document D3, column 5, lines 22 to 27). The authors of document D3 are thus demonstrably aware of the existence of these two types of transmission line. Although not explicitly stated as such, it is clear that modelling the transmission lines will give quite different results and hence transmission line parameters, depending on whether what is modelled is a high frequency signal line or a low frequency power line, since the disclosed method of modelling provides for the specific component values being adjusted to achieve desired electrical characteristics (see paragraph 2.8 above). In the Board's view, therefore, there is nothing inventive in using different transmission line parameters for power lines, i.e. low frequency lines, and signal lines, i.e. high frequency lines.

2.10. As regards the higher frequencies which achievable by means of the high frequency integrated circuit die package according to the invention in suit, the Board agrees with the examining division's assessment (decision, page 10, first paragraph) that the particular values or ranges of values selected by the present application would involve an inventive step only if those values or ranges of values would lead to an unexpected effect. In agreement with the examining division, the Board does not consider it to be an unexpected effect that improved impedance matching permits operation at higher frequencies.

2.11. For the foregoing reasons the Board considers that neither the invention claimed in claim 1 of the main request nor the invention claimed in claim 1 of the third auxiliary request involves an inventive step.

The first auxiliary request

3. Claim 1 of the first auxiliary request includes some further features as compared to claim 1 of the main request.

(a) The transmission line sections are formed at least in part by a continuous trace deposited on the substrate (see paragraph (m')), with the shielded strip line section comprising a layer of tungsten, and the adjoining transmission line sections comprising successive layers of tungsten, nickel and gold (paragraph (o')).

(b) The capacitor section is required to have a length that is less than the length of the microstrip line (see paragraph (m')) and less than the width of the microstrip line trace section (see paragraph (p')), to have a width not more than half the length of the microstrip line trace section, and to cooperate with the adjacent portion of the base and an interposed section of the substrate to define a capacitor which controls the impedance of the input/output transmission line.

3.1. As regards the features of paragraph (a) above, transmission lines fabricated from these materials are already known from the nearest prior art, document D3, where it is stated (column 5, lines 31 to 35) that "the conductor patterns 15. are made of tungsten paste and the conductor patterns 14 and 16 are made of Ni-Au or Au plate on the tungsten paste conductor patterns".

3.2. As regards the feature set out in paragraph (b) above, claim 1 of the first auxiliary request differs in this respect from the teaching of document D3 only by the choice that the length of the capacitor section must be less than both the length and the width of the microstrip line section and the width less than half the length of the microstrip line section. Circuit modelling according to document D1 explicitly includes inter alia capacitances C5 and C6 relating to the bond pad (24) and the combined end-effect and wire bond inductance L1 (document D1, Figure 4 and column 4, lines 11 to 13. and 20 to 21, respectively). The skilled person would know how to use this circuit modelling to adjust the relevant parameters belonging to different sections of the transmission line in order to optimise impedance matching, including arriving at their appropriate lengths and widths. The Board therefore takes the view that, absent any benefit other than impedance matching, the choice of the claimed restraint on the length and width of the capacitor section does not make any inventive contribution to the claimed high frequency integrated circuit die package.

3.2.1. The specific restraints on the length and width of the capacitor section must also be considered arbitrary, as the length and width of the capacitor section do not alone determine the impedance of a particular line section. Instead, the impedance is affected by the surrounding materials and also, for example, by the position of the vias (called poles in document D3) that provide an electrical connection between the top and the base of the package (c.f., document D3, column 6, lines 28 to 34, "the characteristic impedance Z0 of the line can be optionally selected by adjusting the distance between the conductor patterns 14, 16 and the copper block 11 and between the conductor patterns 14, 16 and the conductor poles 19a"; and document D1, column 3, lines 8 to 14, "In order to improve the stripline transmissive characteristics of pseudostrip section 16 and the package as a whole, a plurality of apertures, or vias, 26 are formed in the package.").

The second auxiliary request

4. In claim 1 of the second auxiliary request, the features corresponding to paragraphs (m) and (n) of the claim 1 of the main request and the third auxiliary request are omitted, and the features corresponding to paragraph (r') of the third auxiliary request are added. The relevant arguments that the subject matter of claim 1 of the third auxiliary request does not involve an inventive step therefore apply equally to claim 1. of the second auxiliary request.

The fourth auxiliary request

5. Amendments (Article 123(2))

5.1. Claim 1 of the application as originally filed reads as follows:

"1. A high frequency integrated circuit die package comprising:

an electrically conductive base (10),

a dielectric substrate (12) having an opening (14) therein,

a package wall section (20) bonded to the base and circumscribing said opening,

a die (16) mounted within said substrate opening and having a plurality of connecting pads (17),

a lid (26) bonded to the wall section, and

a plurality of conductive traces (36,40,42) formed on said dielectric substrate and positioned between a portion of said substrate and said wall section, at least some of said traces (40,42) forming an input/output transmission line having a series connected microstrip line section (40a), a shielded strip line section (40b), and a capacitor section (40c),

said capacitor section being electrically connected to one of said connecting pads of said die."

5.2. Claim 1 of the fourth auxiliary request includes, among others, in addition to the features claimed in claim 1 as originally filed, that in the wall section "each of the cutout portions (50, 52, 54, 56) exposes at least two low frequency input/output transmission lines (36a to 36j)".

5.3. However, the cutout portions described and shown in the drawings expose either low frequency transmission lines 36a to 36j, which is the case for cutouts 50 and 52, or high frequency transmission lines 40 and 42, which is the case for cutouts 54 and 56. Thus, it is not the case that each of the cut-outs exposes low frequency transmission lines.

5.4. Moreover, there is also basis in the description or the drawings of the specific lower limit of at least two low frequency transmission lines.

5.5. Claiming that each of the cutout portions (50, 52, 54, 56) exposes at least two low frequency input/output transmission lines (36a to 36j) thus introduces subject matter which goes beyond the contents of the application as filed and thereby contravenes the provisions of Article 123(2) EPC.

6. Inventive step

6.1. It is to be observed that even if claim 1 of the fourth auxiliary request were considered not to contravene the provisions of Article 123(2) EPC, the subject matter of the claim would fail as being obvious, since there is no reason to consider the particular construction of the wall section (see paragraph 2.7 above), and even less the specific number of contacts exposed by the wall section, as making an inventive contribution.

The fifth auxiliary request

7. Amendments (Article 123(2) EPC)

7.1. Claim 1 of the fifth auxiliary request differs from claim 1. of the application as filed essentially in that it requires that the transition to the adjoining trace sections at each end of the shielded strip line trace section is a tapered transition, without, however, requiring that the shielded strip line section is narrower than those adjoining sections, i.e., that it is narrower than the microstrip line trace section (40a) section and narrower than the capacitor trace section (40c). However, although a tapered transition as claimed clearly implies a change in width, the wording of claim 1 of the fifth auxiliary request is not limited to the only implementation described and shown in the application as filed, which is that the shielded strip line section is narrower than the adjoining sections of the transmission line. The wording of claim 1 of the fifth auxiliary request therefore does not exclude configurations in which the shielded strip line section is wider than the adjoining sections of the transmission line and therefore includes subject matter which was not contained in the application as filed and, hence, contravenes the provisions of Article 123(2) EPC.

8. Inventive step

8.1. It is to be observed that even if claim 1 of the fifth auxiliary request were considered not to contravene the provisions of Article 123(2) EPC, its subject matter would not be patentable for being obvious.

8.1.1. Thus, the essential differences between claim 1 of the main request and claim 1 of the fifth auxiliary request (see paragraph IX above) are

(a) the omission from the latter of the features claimed in paragraphs (j) to (n) of the main request, and

(b) the addition of the requirement that the transitions on either side of the shielded strip line trace section are tapered.

Claim 1 of the fifth auxiliary request can therefore be considered to correspond to claim 1 of the third auxiliary request albeit with some omitted features. The arguments made above in relation to the claim 1 of the third auxiliary request concerning the use of different types of transmission lines and concerning tapering of the transitions (see, in particular paragraphs 2.9 and 2.6, respectively) at the ends of the shielded strip line sections of the high frequency transmission lines therefore still apply.

9. In summary, in the Board's judgement none of the main and first to fifth auxiliary requests complies with the requirements of the EPC. Thus, claim 1 of each of the main request and the first to third auxiliary request does not involve an inventive step as required by Article 56 EPC, and claim 1 of each of the fourth and fifth auxiliary request neither complies with the provisions of Article 123(2) EPC nor does it involve an inventive step as required by Article 56 EPC.

ORDER

For these reasons it is decided that:

The appeal is dismissed.

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