|European Case Law Identifier:||ECLI:EP:BA:2011:T075407.20110706|
|Date of decision:||06 July 2011|
|Case number:||T 0754/07|
|IPC class:||G06F 11/22|
|Language of proceedings:||EN|
|Download and more information:||
|Title of application:||Microcomputer having built-in nonvolatile memory and check system thereof|
|Applicant name:||Sharp Kabushiki Kaisha, et al.|
|Relevant legal provisions:||
|Keywords:||Inventive step - no (claim 6 of main and auxiliary requests)|
Summary of Facts and Submissions
I. This is an appeal by the joint applicants (appellants) against the decision, dispatched on 30 November 2006, by the examining division to refuse European patent application No. 00 303 065.7. The reasons for the decision stated inter alia that the subject-matter of claim 1 according to the then first auxiliary request lacked inventive step, Article 56 EPC 1973, in view of the following document:
D1: JP 61 221837 A
in the light of its English translation (referred to below as D1'), a copy of which was annexed to the decision.
II. A notice of appeal was received on 5 February 2007, the appeal fee being paid on the same day. The appellants requested that the decision be set aside and that the case be remitted to the first instance to continue examination and grant a patent.
III. On 10 April 2007 a statement of grounds of appeal was received, together with amended claims according to a main and an auxiliary request. The appellants requested that the decision be set aside and that the case be remitted to the first instance with the order to grant based on the main or auxiliary request. The appellants also requested oral proceedings if neither the main nor the auxiliary request were considered allowable.
IV. In an annex to a summons to oral proceedings the board expressed doubts inter alia as to the inventive-step, Article 56 EPC 1973, of the subject-matter of claim 6 of the main and auxiliary requests.
V. In a fax received on 17 June 2011 the appellants stated that they would not be attending the oral proceedings. No substantive arguments or amendments were submitted.
VI. Oral proceedings were held on 6 July 2011 in the absence of the appellants, as announced in advance. At the end of the oral proceedings the board announced its decision.
VII. In addition to an independent apparatus claim 1, the claims according to both the main and the auxiliary request comprise an identically-worded method claim 6 which reads as follows:
"A method of testing a first built-in non-volatile memory (11) of a microcomputer (10) comprising the steps of:
transmitting from an external check system (20, 30) to the microcomputer (10) a test program for testing the first built-in nonvolatile memory (11);
executing a control program stored in a second built-in nonvolatile memory (16) of the microcomputer (10) to enable the microcomputer (10) to receive the test program, commence execution of the test program, and send a test result to the external check system (20, 30) upon completing of the test program; and
storing and subsequently executing the received test program in a volatile memory (12) driven by a power source voltage supplied through a terminal (17a, 17b) connected to the external check system (20, 30), wherein a deletion of the test program from the volatile memory (12) is effected by disconnecting the power source voltage being supplied thereto through the terminal (17a, 17b)."
Reasons for the Decision
1. Admissibility of the appeal
In view of the facts set out at points I to III above, the appeal is admissible.
2. The appellants' non-attendance at the oral proceedings
2.1 As announced in advance, the duly summoned appellants did not attend the oral proceedings.
2.2 In accordance with Article 15(3) RPBA (Rules of Procedure of the Boards of Appeal, OJ EPO 2007, 536), the board relied for its decision only on the appellants' written submissions. The board was in a position to decide at the conclusion of the oral proceedings, since the case was ready for decision (Article 15(5, 6) RPBA), and the voluntary absence of the appellants was not a reason for delaying a decision (Article 15(3) RPBA).
3. The context of the invention
3.1 The application relates to the testing of a non-volatile memory of a microcomputer realized in an IC card. Such a memory, for instance an EEPROM (Electrically Erasable and Programmable Read Only Memory), retains its contents when power is removed. IC cards are used in such applications as electronic settlements of accounts, public transportation, medical applications and distribution. For this reason, not only higher reliability, but also higher security against forgery are required for the IC cards. The non-volatile memory of the IC card is consequently tested using a software program before the card is used. The application addresses the problem that the test program may contain highly confidential data which, for security reasons, should not remain on the IC card once testing is complete. The application solves this problem by connecting the IC card to an external communication device via a communication circuit which supplies power to the IC card and from which a test program is transferred to a built-in RAM in the IC card. The CPU in the IC card executes the test program stored in the built-in RAM to test the non-volatile memory, and a test result and a fail log are transferred to the external communication device. When the IC card is disconnected from the external communication device the contents of the built-in RAM in the IC card, in contrast to the contents of the non-volatile memory, are lost, hence ensuring that the test program is not left on the IC card after testing is complete.
4. Document D1
4.1 In the light of D1', the system known from D1 includes a computer (1) and a checking device (6). A checking program is stored in a ROM (8) in the checking device. The ROM (3) of the computer stores the main program for operation of the computer by the CPU (2). The computer (1) also includes a RAM (4). CPU 2, ROM 3 and RAM 4 are interconnected via an internal bus 5. The external checking device (6) also includes a transfer ROM (7) storing a transfer program. In a checking operation, the checking program is transferred from ROM 8 to the RAM 4 in the computer under the control of the transfer program in ROM 7.
4.2 The board understands that the CPU in the computer of D1 communicates with the two ROMs (7,8) in the checking device via bus 11 (referred to on page 8 of D1', lines 1 to 2, as a "connecting cable") which is common to both computer 1 and checking device 6. Since the figure of D1 shows bus 11 being connected to each of switching circuit 10, ROM 7 and ROM 8, the board understands bus 11 to be parallel.
4.3 One issue in first instance proceedings was whether computer 1 in D1 had its own power source, the decision stating (reasons, 3.4) that it did. The board agrees. The sentence bridging pages 7 and 8 of the translation mentions checking of computers "not requiring a connection between the computer and the checking device (connecting cable 11) after transfer of the checking program is complete". If computer 1 can execute the check program without a connection to the checking device 6 then it must have its own power source. D1' (page 7, lines 4 to 7) also supports this interpretation, since it states that "the power of the computer 1 is turned on". Moreover, given that the computer is used for control purposes (see D1', page 4, lines 4 to 9), it must have its own power source to work when it is not being checked.
4.4 Another issue in first instance proceedings was whether the check program in RAM 4 in D1 was deleted when the computer was disconnected from the check device. According to the decision, it is (reasons 3.6). The board disagrees. As the computer has its own power source, the power supply to RAM 4 in the computer is probably unaffected by disconnecting the computer from the checking device.
5. Novelty, Article 54(1,2) EPC 1973
5.1 The claims according to the main request are the same as those according to the first auxiliary request forming the basis of the appealed decision.
5.2 D1 discloses the following features of claim 6 according to the main and auxiliary requests:
a method of testing a first built-in non-volatile memory (3) of a microcomputer (1) comprising the steps of transmitting from an external check system (6) to the microcomputer (1) a test program for testing the first built-in nonvolatile memory (3), the received test program being stored and subsequently executed in a volatile memory (4).
5.3 Hence the subject-matter of claim 6 according to the main and auxiliary requests differs from the disclosure of D1 in the following features:
a. executing a control program stored in a second built-in nonvolatile memory of the microcomputer to enable the microcomputer to receive the test program, commence execution of the test program and send a test result to the external check system upon completing of the test program;
b. the volatile memory being driven by a power source voltage supplied through a terminal connected to the external check system,
c. wherein a deletion of the test program from the volatile memory is effected by disconnecting the power source voltage being supplied thereto through the terminal.
6. Inventive step, Article 56 EPC 1973
6.1 The difference features set out above form two technically unrelated groups of features, whose contributions to inventive step must be assessed separately:
group 1: feature "a" (communication program in second nonvolatile memory in the microcomputer) and
group 2: features "b" and "c" (provision of power by checking system, test program deleted from volatile memory by disconnecting checking system).
6.2 The appellants have conceded (grounds of appeal, page 3, point 12) that removing power from the RAM in the computer in D1 would delete its contents.
6.3 Regarding group 1 of the difference features, the objective technical problem is seen as to fill in the gaps in the disclosure of D1 to realize the computer 1. The board takes the view that it would have been obvious to store a program for receiving and executing the test program in a separate ROM in the computer to the control routines to decrease the chance of accidental execution during control (see page 4, lines 4 to 9). Moreover D1 is silent as to what happens with the result of running the test program. Sending a test result to the checking system would have been an obvious option. The reasons for the decision (2.2) state that the provision of two ROMs instead of one in the computer 1 would have been a trivial difference, indeed two ROMs could even be on the same chip. The board agrees.
6.4 Regarding group 2 of the difference features, the objective technical problem is seen as to simplify the computer in D1, the solution being to remove the computer's own power source and to supply power to the computer from the checking circuit when testing the non-volatile memory. The board considers this problem and its solution as lying within the everyday design skills of the skilled person. The effect set out in difference feature "c" (deletion of the test program in the volatile memory) is, as the appellants have conceded, an inevitable consequence of difference feature "b" (power for the volatile memory being provided by the external check system).
6.5 The appellants have not challenged the board's assessment of D1 or inventive step, both of which were set out as the board's preliminary opinion in the annex to the summons to oral proceedings. The board adopts is preliminary opinion as its final view.
6.6 Hence the board finds that the subject-matter of claim 6 according to the main and auxiliary requests does not involve an inventive step, Article 56 EPC 1973, and the decision cannot be set aside.
For these reasons it is decided that:
The appeal is dismissed.