T 1801/11 (Error detection in communication devices/ALCATEL) of 24.7.2014

European Case Law Identifier: ECLI:EP:BA:2014:T180111.20140724
Date of decision: 24 July 2014
Case number: T 1801/11
Application number: 07734863.9
IPC class: H04L 12/56
H04L 29/06
Language of proceedings: EN
Distribution: D
Download and more information:
Decision text in EN (PDF, 344.602K)
Documentation of the appeal procedure can be found in the Register
Bibliographic information is available in: EN
Versions: Unpublished
Title of application: Apparatus for detecting errors in a communication system
Applicant name: ALCATEL LUCENT
Opponent name: -
Board: 3.5.05
Headnote: -
Relevant legal provisions:
European Patent Convention 1973 Art 56
Keywords: Inventive step - main request and auxiliary request 1 (no)
Inventive step - auxiliary request 2 (yes, after amendment)
Catchwords:

-

Cited decisions:
-
Citing decisions:
-

Summary of Facts and Submissions

I. The appeal is against the decision of the examining division, posted on 12 April 2011, to refuse European patent application No. 07734863.9 on the ground of lack of novelty (Article 54 EPC), having regard to the combined disclosures of

D1: EP-A-0 977 457;

D2: "RPC: Remote Procedure Call Protocol Specification Version 2", Sun Microsystems, RFC 1057, pp. 1-25, June 1988.

Additionally, in an obiter dictum under the heading "Further Comments", it was further held that the arguments in relation to D1 and D2 brought forward by the applicant were not convincing.

II. Notice of appeal including the statement setting out the grounds of appeal was received on 9 June 2011. The appeal fee was paid on the same day. With the notice of appeal the appellant filed a new set of claims. It requested that the decision of the examining division be set aside and that a patent be granted on the basis of the new claims. In addition, oral proceedings were requested as an auxiliary measure.

III. A summons to oral proceedings scheduled for 24 July 2014 was issued on 27 March 2014. In an annex to this summons, the board expressed its preliminary opinion on the appeal pursuant to Article 15(1) RPBA. In particular, objections were raised under Article 52(1) EPC in conjunction with Article 56 EPC 1973, having regard to the combined teaching of D1 and D2.

IV. With a letter of reply dated 24 June 2014, the appellant submitted amended claims according to a main request and an auxiliary request alongside two amended description pages, and provided counter-arguments with regard to the objections raised in the board's communication under Article 15(1) RPBA.

V. Oral proceedings were held as scheduled on 24 July 2014, during which the appellant filed an additional set of claims as a second auxiliary request. All the pending requests were admitted into the proceedings and their allowability was discussed.

The appellant's final request was that the decision under appeal be set aside and that a patent be granted on the basis of the claims according to the main or auxiliary requests filed with letter dated 24 June 2014, or alternatively on the basis of claims 1 to 8 submitted as "auxiliary request 2" at the oral proceedings before the board.

At the end of the oral proceedings, the decision of the board was announced.

VI. Claim 1 of the main request reads as follows:

"An apparatus (101; 301) comprising:

a control module (103; 303) in the apparatus (101; 301) and a communication module (105; 305) in the apparatus (101; 301), the control module (103; 303) having a processor (109; 309),

an interface (107; 307) in the apparatus (101; 301) for transmitting control data from said control module (103; 303) to said communication module (105; 305) to control operation thereof,

said communication module (105; 305) comprising:

detection means (129; 329) for detecting error[sic] respectively associated with communication signals received from said control module (103; 303), and

reporting means (131-139; 329) for generating a message to said control module (103; 303), said message comprising an indication of an error associated with said received communication signals and detected by the detection means (129; 329)."

Claim 1 of the first auxiliary request ("Auxiliary Request") reads as follows (amendments compared to the main request underlined by the board):

"A communication device (101; 301) comprising:

a control module (103; 303) in the communication device (101; 301) and a line card (105; 305) in the communication device (101; 301) for connection to a communication network, the control module (103; 303) having a processor (109; 309),

an interface (107; 307) in the communication device (101; 301) for transmitting control data from said control module (103; 303) to said line card (105; 305) to control operation thereof, wherein the control interface (107; 307) comprises a bi-directional data bus (143),

said line card (105; 305) comprising:

detection means (129; 329) for detecting error[sic] respectively associated with communication signals received from said control module (103; 303), and

reporting means (131-139; 329) for generating a message to said control module (103; 303), said message comprising an indication of an error associated with said received communication signals and detected by the detection means (129; 329)."

Claim 1 of the second auxiliary request ("Auxiliary Request 2") reads as follows:

"A communication device (101; 301) comprising:

a control module (103; 303) in the communication device (101; 301) and a line card (105; 305) in the communication device (101; 301) for connection to a communication network, the control module (103; 303) having a processor (109; 309),

a control interface (107; 307) in the communication device (101; 301) for transmitting control data from said control module (103; 303) to said line card (105; 305) to control operation thereof, said control interface (107; 307) comprises a bi-directional data bus (143) for transmitting said control data from said control module (103; 303) to said line card (105; 305),

said line card (105; 305) comprising:

a status detector (129; 329) for detecting an error respectively associated with said control data received from said control module (103; 303), and reporting means (131-139; 329) for generating a message for transmission to said control module (103; 303), said message comprising an indication of said error associated with said received control data and detected by the status detector (129; 329),

wherein said control module is configured to determine a value of a parity bit based on bits contained in said control data and to transmit the parity bit with said control data via the control interface, wherein said status detector comprises a parity check module (132), an address verifier (134), a control module status detector (136) and a clock signal detector (138), wherein said parity check module (132) is configured to determine a parity bit from bit values contained in said control data and to compare this with said parity bit transmitted with said control data, wherein said address verifier (134) is configured to, if said control data contains a memory address, check whether the address is valid, wherein said control module status detector (136) is configured to detect a status of the control module, and wherein said clock signal detector (138) is configured to detect a clock signal from said control module transmitted over a clock line (149)."

Reasons for the Decision

1. The appeal is admissible.

2. MAIN REQUEST

This request was filed in response to the objections raised in the board's communication under Article 15(1) RPBA. Claim 1 of the main request differs from claim 1 underlying the impugned decision essentially in that it further specifies that (emphasis added by the board)

A) the first module is a control module in the apparatus and the second module is a communication module in the apparatus;

B) the communication module comprises detection means for detecting errors respectively associated with communication signals received from the control module;

C) the communication module comprises reporting means for generating to the control module a message comprising an indication of an error associated with said received communication signals and detected by the detection means.

Feature A)A) is based e.g. on Figures 1 and 2, whilst feature B)B) is based on page 11, lines 19-23 and claim 6 of the application as filed. Feature C)C) is based on page 13, lines 11-19 of the application as filed. Hence, the above amendments comply with Article 123(2) EPC.

2.1 Article 52(1) EPC: Novelty and inventive step

The board judges that claim 1 of this request does not meet the requirements of Article 52(1) EPC in conjunction with Article 56 EPC 1973, for the following reasons:

2.1.1 The board concurs with the finding of the decision under appeal that document D1 constitutes the closest prior art for the subject-matter claimed. Like the present invention, D1 is related to internal communications between a control module and a line card within a network switch and discloses the following limiting features of claim 1:

An apparatus ("ATM switch"; see Fig. 1) comprising:

- a control module ("switch controller 12"; "signaling protocol module 103"; see column 9, lines 9-10) having a processor ("my PROC 13") and a communication module ("line card LC1"; see Figs. 1 and 2);

- an interface ("SPAI interface 102") for transmitting control data from said control module to said communication module to control operation thereof (see e.g. column 8, lines 57-58: "... The SPAI interface 102 implements the controller counterpart of the PHAI interface 101 ..." in conjunction with Fig. 2, dotted line);

- said communication module comprising detecting and reporting means ("PHAI interface 101") for generating a message to said control module, said message comprising an indication of an error (see e.g. column 8, line 45 to column 9, line 5: "... A PHAI 101 provides access to the low-level line card resources ..., it is also possible to obtain ... error statistics information through this interface ... the PHAI also serves as a ... mailbox through which various asynchronous alarm events from the line cards are delivered").

2.1.2 The board subscribes to the appellant's view that the teaching of D1 that the PHAI interface is able to obtain error statistics information and various alarm events from the line cards according to the disclosure of column 8, line 45 to column 9, line 5 of D1 does not qualify as evidence that this interface is also able to detect the corresponding errors. In conclusion, the board agrees with the appellant that the difference between the subject-matter of claim 1 and the disclosure of D1 consists in that

i) the generated message comprises an indication of an error associated with said received communication signals and detected by the detection means of the communication module.

Accordingly, the subject-matter of claim 1 is considered to be novel over D1 (Article 54 EPC 1973).

2.1.3 Distinguishing feature i)i) is supposed to have the technical effect of discovering and correcting software errors in a network switch/router (cf. page 15, lines 24-30 of the application as filed). The objective problem to be solved by present claim 1 may therefore be formulated as "how to implement fault-tolerant communications between the control and communication modules in the system of D1".

2.1.4 The board considers that the skilled person would, starting from the disclosure of D1, recognise that D1 teaches that the communication mechanism applied for transmissions between the controller and the line card depends completely on the processing platform used and that, under certain circumstances, the RPC (Remote Procedure Call) protocol is supposed to be employed therefor (see D1, column 9, lines 21-25 and lines 37-40; claims 21, 24 and 26). The board therefore agrees with the finding of the decision under appeal that the skilled person in the field of telecommunication systems would consider D2 relating to the standardised RPC protocol in combination with D1 in order to solve the above objective problem. As to said RPC protocol, document D2 moreover clearly discloses, contrary to the view of the appellant, that a generated message ("RPC reply message") comprises an indication of an error such as a wrong RPC version number (indicated by "RPC_MISMATCH = 0") or a failed authentication (indicated by "AUTH_ERROR = 1") being associated with said received communication signals ("RPC call message") and being detected (see e.g. D2, page 8, section 8, last paragraph).

As a consequence, the board finds that the skilled person would, when faced with the above-identified objective problem, consider the disclosure of D2 and apply its teaching to the system of D1 in order to implement an efficient fault management scheme between the control and communication modules. Accordingly, the skilled person would arrive at the solution of claim 1 in an obvious manner.

2.1.5 The appellant argued that D2 merely taught that an RPC call message is accepted or rejected by the receiving device rather than generating a message comprising an indication of the detected error. However, the board judges that D2 not only teaches accepting or rejecting an RPC call message but also undeniably indicates a corresponding error code such as "RPC_MISMATCH = 0" (cf. D2, page 8, section 8, last paragraph).

2.1.6 In view of the above, the subject-matter of claim 1 of this request does not involve an inventive step having regard to the combined teaching of D1 and D2.

2.2 In conclusion, this request is not allowable under Article 56 EPC 1973.

3. FIRST AUXILIARY REQUEST

This request was also filed in response to the objections raised in the board's communication under Article 15(1) RPBA, whilst claim 1 of this request differs from claim 1 of the main request basically in that it further specifies that (emphasis added)

D) the claimed apparatus is a communication device;

E) the communication module is a line card for connection to a communication network;

F) the control interface comprises a bi-directional data bus.

Features D)D) and E)E) are supported e.g. by the disclosure of page 1, lines 3-9 and page 28, lines 29-32 in conjunction with Fig. 2, while feature F)F) is based on page 11, lines 5-7 of the application as filed. Thus, the above amendments comply with Article 123(2) EPC.

3.1 Article 52(1) EPC: Novelty and inventive step

3.1.1 The feature analysis concerning the main request set out in point 2.1.12.1.1 above applies mutatis mutandis to claim 1 of this request.

3.1.2 Furthermore, since the respective components of D1, i.e. the switch controller 12, the signaling protocol module 103, the SPAI and PHAI interfaces, and the line cards, are co-located within an ATM switch (see e.g. D1, Figures 1 and 2 in conjunction with column 9, lines 9-10: "... The signaling module 103 can run on a local switch controller 12 ..."), and since the ATM switch represents unequivocally a "communication device" as claimed, the board finds that features D)D) and E)E) are also clearly anticipated by D1.

3.1.3 Feature F)F) was purportedly introduced to more clearly distinguish the subject-matter of claim 1 from the combined teaching of D1 and D2 in view of the fact that, according to the appellant, D1 provided for two mutually exclusive communication mechanisms to be used between the signaling protocol module and the respective line cards, namely either a "bus-based communication mechanism" or a "distributed message passing mechanism" like the RPC protocol according to paragraph [0034] of D1. Since, moreover, the distributed message passing mechanism was only used in the event that the signaling protocol module was located in a remote computing entity based on that teaching, this option would not be considered by the skilled person, in particular when taking into account the resulting increased latency times associated with that option. Rather, the skilled person would prefer the bus-based communication mechanism in the present case, especially when a bi-directional data bus was assumed to be used for data communication between the signal protocol module and the line cards, as required by feature F)F) . Consequently, the skilled person would not even consider the teaching of D2 related to the RPC protocol and thus would not combine the teachings of D1 and D2 at all (cf. appellant's letter of reply dated 24 June 2014, sections 5 and 6).

The board notices however that paragraph [0034] of D1, quoted by the appellant, states:

"... if the target hardware provides a dedicated control bus between the line cards and the internal switch controller(s) then using a bus-based communication mechanism will prove to be less expensive ... Yet in another situation, if the signaling protocol module is located in a remote computing entity then a general purpose distributed message passing mechanism like RPC will be more appropriate ... In fact, in the embodiments described in the present specification, a combination of all the above-mentioned mechanism is used depending on the communication performance requirements."

From this passage the skilled person would understand that the "bus-based communication mechanism", whatever it may imply, is considered less expensive if a dedicated control bus is employed between the respective control and communication modules, and that the RPC scheme is deemed more appropriate if the associated signaling protocol module 103 is located in a remote unit. However, the board finds that neither the fact that a bi-directional data bus is supposed to be utilised for data transfers between the SPAI and PHAI interfaces nor the case that the signaling protocol module is located remotely from its dedicated interface, i.e. the SPAI interface, would necessarily and exclusively lead the skilled person to apply the so-called "bus-based communication mechanism" to transmit control data between the SPAI and PHAI interfaces. This is even more so when considering that, according to D1, also a combination of both bus-based and RPC-like communication schemes might well be used, depending on distinct performance requirements (see D1, column 9, lines 45-49).

3.1.4 Instead, the board finds that the application of

inter-process communication (IPC) calls in D1 (see e.g. paragraph [0050]) at least implicitly discloses that a typical bi-directional data bus is inherently employed for the internal data transfer between the control and communication modules in D1, in accordance with feature F)F) of claim 1. Accordingly, the observations concerning the main request set out in points 2.1.22.1.2 to 2.1.52.1.5 above with regard to the distinguishing feature, the objective problem, and the argumentation on obviousness apply mutatis mutandis to claim 1 of this request.

3.1.5 In view of the above, the subject-matter of claim 1 of this request likewise does not involve an inventive step having regard to D1 and D2.

3.2 In conclusion, this request is also not allowable under Article 56 EPC 1973.

4. SECOND AUXILIARY REQUEST

In spite of the fact that this request was submitted during the oral proceedings before the board, i.e. at a very late stage of the overall procedure, the board admitted it into the proceedings under Article 13(1) and (3) RPBA, since it was regarded as a legitimate and successful attempt to overcome the outstanding objections raised by the board under Article 56 EPC 1973 (cf. point 4.14.1 below), and since the board could deal with it without having to adjourn the oral proceedings.

Claim 1 of this request, being the only independent claim of the present claim set, differs from claim 1 of the first auxiliary request essentially in that it further specifies that

G) the bi-directional data bus is used for transmitting the control data from the control module to the line card;

H) the detection means is a status detector;

I) the control module is configured to determine a value of a parity bit based on bits contained in the control data and to transmit the parity bit with the control data via the control interface;

J) the status detector comprises a parity check module, an address verifier, a control module status detector and a clock signal detector;

K) the parity check module is configured to determine a parity bit from bit values contained in said control data and to compare this with said parity bit transmitted with said control data;

L) the address verifier is configured to, if said control data contains a memory address, check whether the address is valid;

M) the control module status detector is configured to detect a status of the control module;

N) the clock signal detector is configured to detect a clock signal from said control module transmitted over a clock line.

The above amendments were made in response to the inventive-step objections raised and maintained by the board. Features G)G) and H)H) are supported by page 11, lines 5-7 and 19-23, whilst features I)I) to N)N) are based on page 11, line 24 to page 12, line 17 of the application as filed.

Hence, the board is satisfied that the above amendments comply with Article 123(2) EPC.

4.1 Article 52(1) EPC: Novelty and inventive step

In the board's judgment, claim 1 of this request meets the requirements of Article 52(1) EPC, for the following reasons:

4.1.1 The board finds that the difference between the subject-matter of claim 1 of this request and the disclosure of D1 - in addition to feature i)i) (see point 2.1.22.1.2 above) - consists in features H)H) to N)N) . Thus, the subject-matter of present claim 1 is novel (Article 54 EPC 1973).

4.1.2 The appellant convincingly argued at the oral proceedings before the board that the overall technical effect achieved by the distinguishing features is to speedily detect internal errors at the physical layer. Such an effect can also be derived from the present description (see e.g. page 17, line 28 to page 18, line 8 of the application as filed). The board therefore considers that the objective problem to be solved by claim 1 may thus be formulated as "how to enable fast detection of multiple physical-layer errors within the switch of D1".

4.1.3 Starting from D1, which cannot provide any useful teaching as regards how to actually perform error detection inside a network switch (cf. point 2.1.22.1.2 above), the skilled person in the field of telecommunication systems would apply the error detection technique according to the RPC protocol, for the reasons provided in points 2.1.42.1.4 and 3.1.33.1.3 above. However, the error detection scheme of the RPC protocol, typically being an application-layer protocol implemented on top of the connection-oriented TCP/IP protocol stack, is merely concerned with error detection exerted at the application layer. That means that detecting errors as to transmissions at the physical layer, including parameters such as parity bits, memory addresses, and clock signals, is not covered by the RPC protocol at all. Instead, the RPC scheme according to D2 refers solely to the detection of errors such as RPC version number mismatch and authentication errors (see e.g. D2, page 8, last paragraph), i.e. application-specific parameters. Hence, in the absence of any promising hint or motivation discernible in the prior-art documents on file towards the solution claimed, the board sees no good reason why the skilled person, starting out from D1 and applying the teaching of D2, would come up with such a solution which credibly provides a synergistic effect going beyond the sum of the individual effects of the above distinguishing features.

4.1.4 Consequently, in the light of the cited prior art, the subject-matter of claim 1 of the second auxiliary request is held to be new and to involve an inventive step within the meaning of Article 52(1) EPC in conjunction with Articles 54 and 56 EPC 1973.

5. Since all the other requirements of the EPC are also found to be fulfilled, the board decides to grant a patent on the basis of claims 1 to 8 according to the second auxiliary request.

Order

For these reasons it is decided that:

1. The decision under appeal is set aside.

2. The case is remitted to the department of first instance with the order to grant a patent on the basis of claims 1 to 8 submitted as auxiliary request 2 at the oral proceedings before the board, and the description and the drawings as published.

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