|Date of decision:||08 October 2001|
|Case number:||T 0513/97|
|IPC Class:||H01L 27/115|
|Language of proceedings:||EN|
|Download and more information:||
|Title of application:||Semiconductor device having capacitor and manufacturing method thereof|
|Applicant name:||MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.|
|Relevant legal provisions:||
|Keywords:||Introduction of a prior art document by the Board to demonstrate common general knowledge
Inventive step (no)
Remittal to the examining division (no)
Reimbursement of the appeal fee (no)
Summary of Facts and Submissions
I. European patent application No. 94 112 106.3 was refused in a decision of the examining division dated 14. January 1997. The ground for the refusal was that the subject matter of claim 1 filed with the letter dated 17 May 1996 did not involve an inventive step having regard to the prior art document D1: EP-A-0 513 894.
II. The appellant (applicant) lodged an appeal on 6 March 1997, paying the appeal fee on 7 March 1997. A statement of the grounds of appeal was filed on 22. April 1997 together with an amended claim 1.
III. In a communication, the Board informed the appellant of its provisional opinion that the subject matter of claim 1 did not appear to involve an inventive step having regard to document D1 and the common general knowledge in the art. As an evidence of the common general knowledge, the following excerpts from the text-book
C. R. M. Grovenor, Microelectronic Materials (Adam Hilger, Bristol, 1989), pages 306 to 308 (hereinafter D12),
IV. In response to a communication of the Board, the appellant filed further observation with the letter dated 12 July 2001, and requested that the decision under appeal be set aside and a patent be granted based on the following documents:
Nos. 1 to 4 (part) filed with the statement of the grounds of appeal; Nos. 4 (part) to 8 filed with the letter dated 17 May 1996
Pages 1 to 5, 5a, 5b, 6, 7/8, 9 to 22 filed with the letter dated 17 May 1996
1/8 to 8/8 filed with the letter dated 17 May 1996.
In case the Board was not to allow the appeal, the appellant requested the case to be remitted to the examining division for further prosecution due to the introduction of document D12 by the Board, and reimbursement of the appeal fee.
V. Claim 1 in accordance with the appellant's request reads as follows:
"1. A semiconductor device comprising an integrated circuit (36) and a capacitor (41) formed on the integrated circuit,
wherein the capacitor comprises a bottom electrode (38) composed of a conductive layer formed on an insulating layer (37) of the integrated circuit, a capacitor dielectric layer (39) composed of one of a ferroelectric layer and a high permittivity dielectric layer formed on the bottom electrode, and a top electrode (40) composed of a conductive layer formed on the capacitor dielectric layer,
the top electrode and bottom electrode of the capacitor are connected with interconnections (44b, 44c) of the integrated circuit through contact holes (43b, 43c) provided in an interlayer insulating layer (46) formed so as to cover the capacitor, and
a passivation layer (47) formed to cover the insulating insulation layer (46) and the interconnections is provided,
characterized in that the interlayer insulating layer comprises a silicon oxide layer, and the passivation layer comprises a silicon nitride layer with the hydrogen atom content of 1021 atoms/cm3 or less."
VI. The reasoning of the examining division in the decision under appeal can be summarized as follows:
(a) Document D1 discloses a semiconductor device having all the features of the precharacterizing part of claim 1. Thus, the subject matter of claim 1 only differs from the device of document D1 in that the hydrogen content in the silicon nitride passivation layer is less than 1021 atoms/cm3, whereas document D1 does not indicate any limit on the hydrogen concentration in the silicon nitride passivation layer.
(b) Document D1 discloses that hydrogen can diffuse from the silicon nitride layer through the upper electrode into the dielectric layer, if the hydrogen concentration is high (cf. D1, column 2, lines 18 to 26 and column 3, lines 29 to 37). Therefore, the skilled person would automatically consider to choose a material which has no hydrogen content or as low hydrogen content as possible as passivation layer.
VII. The appellant presented essentially the following arguments in support of his requests:
(a) Document D1 reflecting the closest prior art teaches to protect the capacitor dielectric against hydrogen from the environment by the use of a silicon nitride layer as a passivation layer. Since however silicon nitride produced by CVD has a relatively high hydrogen content, it is suggested to introduce an hydrogen absorbing layer made by e.g. palladium to absorb the hydrogen diffusing out of the silicon nitride layer during heat treatment.
(b) Document D12 discloses that silicon nitride can be produced by sputtering, but does not refer to the hydrogen content of such a film. Instead, document D12 teaches away from using sputtering, since sputtered films have a rather low breakdown voltage.
(c) Starting from document D1, the technical problem addressed by the present invention therefore relates to finding a simpler means for protection of the capacitor dielectric.
(d) Although the use of silicon nitride layer having zero hydrogen content can be considered as an obvious desideratum, such a material does not exist, at least among those useable as passivation layers for semiconductors. The sputtered silicon nitride film known from document D12 was obviously not considered useable as passivation layer for semiconductors: The fact that passivation layers were deposited using CVD method on a hydrogen absorption layer for a long time (D1 has a priority date of 1991) shows that it was not obvious to replace the CVD layer by a sputtered layer.
Thus, a "non-uniform" thinking is required in order to depart from the use of a CVD silicon nitride together with a hydrogen absorbing layer, as known from document D1, and to try to find if a silicon nitride layer could be used alone.
(e) Document D12 has been introduced by the Board only during the appeal procedure which deprives the appellant from the possibility to discuss carefully this document in the first instance and, if necessary, appeal against a negative decision in the second instance.
The appellant therefore requests that the case be remitted to the examining division for further prosecution, if the Board cannot accept the arguments on patentability. In this case, the reimbursement of the appeal fee is requested.
Reasons for the Decision
1. The appeal complies with Articles 106 to 108 and Rule 64 EPC and is therefore admissible.
2. Inventive step (Articles 52(1) and 56 EPC)
2.1. The application in suit relates to integrated circuits having a capacitor with a dielectric layer made of a ferroelectric material or a material having a high dielectric constant. Such materials are sensitive to exposure to hydrogen which results in leakage currents flowing through the capacitor. Although it is known in the art that silicon nitride layers can be used protecting integrated circuits from hydrogen, conventionally produced silicon nitride passivation layers themselves contain hydrogen which eventually might diffuse to the capacitor dielectric and damage it.
The application in suit solves the above problem by sealing the capacitor with a silicon nitride layer having a hydrogen content less then 1021 atoms/cm3. Such low hydrogen content is attained by replacing the conventional plasma CVD deposition method with a sputtering method.
2.2. Document D1 was considered by both the appellant and the examining division to represent the closest prior art (cf. items VI(a) and VII(a) above). It discloses an integrated circuit comprising a capacitor with a dielectric layer made of a ferroelectric material (cf. Figure 3 and corresponding text). The device comprises a capacitor 2 having a bottom electrode 11 formed on an insulating layer 6, a capacitor dielectric 12 made of a ferroelectric material, and a top electrode 13 formed on the capacitor dielectric layer. The top electrode of the capacitor is connected with interconnections 17, 18 of the integrated circuit through a contact hole provided in an interlayer insulating film 25 made of silicon oxide covering the capacitor (cf. column 9, line 3). The bottom electrode is also connected to an interconnection which implicitly includes contact holes in the interlayer insulating film 25 (column 6, line 53). Finally, a silicon nitride layer is deposited over the entire device to seal it (column 8, lines 51 to 54).
In order to protect the capacitor dielectric from hydrogen contamination, it is suggested in document D1 to coat the entire capacitor with a silicon nitride layer which prevents any hydrogen from the atmosphere from penetrating through to the capacitor. It is furthermore disclosed that a silicon nitride layer which is deposited using gas phase CVD at 700 C contains about 8 at% of hydrogen, whereas a silicon nitride layer deposited using plasma enhanced CVD (PECVD) at 200 to 350 C has a substantially higher hydrogen content (cf. column 3, lines 28 to 32 and column 7, line 49 to column 8, line 4). When the silicon nitride layer is formed using PECVD and thus has a high concentration of hydrogen, the capacitor dielectric layer may be damaged by hydrogen diffusing out from the silicon nitride layer. As a protection from such damage, it is suggested to form a hydrogen absorbing layer made of Pd or Ni between the silicon nitride layer and the upper electrode of the capacitor (cf. column 4, lines 28 to 43; column 9, lines 12 to 45).
2.3. The device of claim 1 differs from that of document D1 thus in that the hydrogen content in the silicon nitride passivation layer is less than 1021 atoms/cm3. In the device of document D1, the silicon nitride layers are formed using gas phase CVD or PECVD which in any case have 8 atomic % of hydrogen or more, i.e. about 1022 or more hydrogen atoms per cm3.
2.4. According to the submission of the appellant, the device of document D1 has the disadvantage that a hydrogen absorbing layer made of Pd or Ni is in practice required to ensure that the capacitor dielectric layer will not be contaminated by hydrogen diffusing out of the silicon nitride layer, since the silicon nitride layers formed using CVD techniques have a hydrogen content of more than 1021 hydrogen atoms/cm3.
The Board agrees with this view, in particular taking into account the fact that the gas phase CVD method described in document D1 produces a silicon nitride layer with a relatively low hydrogen content, but requires a high deposition temperature (700 C). Therefore, as also pointed out in document D1, the gas phase CVD is less suitable than the PECVD method which operates at substantially lower temperatures (200 to 350 C). The PECVD method has however the disadvantage that the produced silicon nitride layers have a high hydrogen content (cf. D1, column 3, lines 20 to 28).
Therefore, in agreement with the appellant's submissions, the technical problem addressed by the application in suit relates to finding a simpler means of providing a reliable protection of the capacitor dielectric layer from hydrogen contamination (cf. item VII(c) above).
2.5. The formulation of the above technical problem must be considered obvious, since the introduction of a hydrogen absorbing layer leads to a more complicated, and thus more costly, manufacture of the semiconductor device.
2.6. As discussed above, document D1 teaches that out-diffusion of hydrogen from the silicon nitride layer protecting the capacitor dielectric layer may cause degradation of the capacitor dielectric layer, and that the hydrogen content of the silicon nitride layer depends on which method was used for forming the layer. An additional layer of a hydrogen absorbing material is recommended when the silicon nitride layer has a high hydrogen content. As convincingly argued in the decision under appeal, the skilled person would in the light of the above teaching seek to use a silicon nitride layer for the passivation layer which has as low hydrogen content as possible, ideally no hydrogen at all, so that a hydrogen absorbing layer can be dispensed with.
2.7. Document D12 which is an excerpt from a text-book on semiconductor technology, describes three methods of forming silicon nitride layers: low pressure CVD (called gas phase CVD in document D1), PECVD, and sputtering (cf. sections 6.3.3 and 6.3.4). It is furthermore shown in document D12 that hydrogen is always present in the CVD methods as a reaction product (cf. Formulas 6.8 and 6.9b). In contrast, sputtering on a silicon nitride target does not inherently entail the production of hydrogen, since the presence of hydrogen is not required.
Moreover, document D12 confirms the findings in document D1 that the LPCVD method is carried out at too high temperature (700 C) for a passivation layer, and that PECVD produces nitride layers having a very high hydrogen content. Therefore, the skilled person would regard sputtering to be the method which produces silicon nitride layer with the lowest hydrogen content (cf. D12, section 6.3.4, first sentence; page 307, last paragraph).
When a sputtering method is used to produce a silicon nitride layer, it appears that the deposited nitride layer would in any case contain less than 1021 hydrogen atoms/cm3.
2.8. The appellant submitted that document D12 merely discloses that silicon nitride can be produced by sputtering, but does not refer to the hydrogen content of such a film. Instead, document D12 teaches away from using sputtering, since sputtered films have a rather low breakdown voltage (cf. items VII(b) and (d) above). Therefore, sputtering was not considered a practical method for forming silicon nitride films in the field of semiconductor devices. Moreover, the appellant contests that it is common knowledge that sputtering of silicon nitride does not entail the production of hydrogen.
2.8.1. Although the appellant correctly observes that document D12 discloses that sputtered silicon nitride films has a "rather low breakdown voltages" (cf. D12, page 307, lines 1 to 3), the "low breakdown voltages" are on the order of 107 V/cm. In document D1, the thickness of the silicon nitride layer 14 protecting the capacitor dielectric layer 12 is approximately 0.1 µm, i.e. 10-5 cm (cf. D1, column 1, lines 57 to 58). Thus, a sputtered film having the above thickness would be capable of withstanding 100 V which should be well in excess of the intended operating voltage of the semiconductor device.
Therefore, the Board finds that document D12 does not teach away from using sputtered nitride films in the device of document D1, since a very high breakdown voltage is not a relevant issue for the use as protective layer for a ferroelectric capacitor. Moreover, the fact that sputtering is mentioned in a textbook as a method of forming silicon nitride layers also indicates that this technique, although less used than CVD methods, had reached a certain degree of acceptance in the field of semiconductor technology.
2.8.2. As to the question whether it is common knowledge that sputtering of silicon nitride does not entail the production of hydrogen, the Board only refers to the basic principles of sputtering, i.e heavy noble gas ions, such as Ar, bombard a target to release atoms from the target which either directly deposit on a substrate, or react with a second gas (nitrogen) (so-called reactive sputtering). Hydrogen is neither an inert gas nor a reaction component for forming silicon nitride.
2.9. Also the argument of the appellant that in the art of semiconductor devices passivation layers were CVD deposited on a hydrogen absorption layer for a long time does not convince the Board (cf. item VII(d) above): The time between the publication of document D1 (19 November 1992) and the priority date of the application in suit (5 August 1993) is less than a year. According to the case law of the boards of appeal, however, the time lapsed between the publication of the closest prior art and the application date of the contested patent has to be at least on the order of decades before it can be viewed as an indication of the presence of inventive step (cf. "Case law of the boards of appeal of the EPO", Second Edition, Section I.D.7.3).
2.10. Therefore, in the Board's judgement, the subject matter of claim 1 does not involve an inventive step within the meaning of Article 56 EPC.
3. The appellant objected as a matter of principle to the introduction of document D12 by the Board. In case the Board was not convinced by the appellant's arguments, the appellant requested that the case be remitted to the examining division for further prosecution on the basis of the new document D12, and that the appeal fee be reimbursed (cf. item VII(e) above).
3.1. As to the objection to the introduction of a new prior art document D12 by a board of appeal, the boards of appeal have the discretion under Article 114(1) EPC to take into account new documents (cf. also G 10/93, reasons, 3 to 5). In this particular case, document D12 is an excerpt from a textbook in the technical field in question, which was cited merely to demonstrate the common general knowledge in the technical field.
3.2. Regarding the request for remitting the case to the department of the first instance for further prosecution, the Board does not see any justification for remitting the case: The Board has in present appeal reached the same conclusion as the examining division regarding inventive step and introduced document D12 to provide more support for the arguments presented in the decision under appeal. Document D12 merely discloses which methods for forming silicon nitride films were known in the art at the priority date of the application in suit. It is also not disputed by the appellant that document D12 discloses only low pressure CVD, PECVD, and sputtering methods for this purpose. Therefore, a remittal is not justified in the present case.
As to the question of a reimbursement of the appeal fee, Rule 67 EPC requires that (i) such reimbursement must be equitable by reason of a substantial procedural violation, and (ii) the appeal is deemed allowable. In the present case, since the Board is empowered to introduce a further prior art into the appeals proceedings, and since the appellant's right to be heard has been met, there has been no procedural violation. Secondly, the appeal is not deemed to be allowable. Thus, none of the conditions of Rule 67 EPC are met. The request for the refund of the appeal fee is therefore denied.
For these reasons it is decided that:
The appeal is dismissed.