|European Case Law Identifier:||ECLI:EP:BA:1995:T031894.19951011|
|Date of decision:||11 October 1995|
|Case number:||T 0318/94|
|IPC class:||H04B 1/40|
|Language of proceedings:||EN|
|Download and more information:||
|Title of application:||Method of communication between register-modelled radio devices|
|Applicant name:||MOTOROLA, INC.|
|Opponent name:||Nokia Mobile Phones Ltd|
|Relevant legal provisions:||
|Keywords:||Inventive step - (yes)|
Summary of Facts and Submissions
I. European patent No. 209 527 was granted on 11 September 1991 on the basis of European patent application No. 85 905 714.3.
II. An opposition was filed on the ground that the subject- matter of the patent did not involve an inventive step (Article 100(a) EPC). The Opponent referred to the following prior art document:
D1: US-A-4 122 304.
III. By its decision of 9 February 1994 the Opposition Division rejected the opposition.
IV. Claims 1 and 8, independent method and device claims respectively, read as follows:
"1. A method of communicating information to control the operation of a radio device, characterised by the steps of:
(a) generating in any of a plurality of register- modelled processor means (400, 200, 110A-C, 120, 140, 180) cooperatively [in] operation within the radio device (100), an information packet (310) having at least an operation code and an argument,
(b) transmitting, serially, said information packet (310) to at least one of the plurality of registered-modelled processor means over a wire- line serial communication link (230),
(c) receiving, serially, said information packet from said wire-line serial communication link (230),
(d) performing the operation designated by said operation code and said argument."
"8. A radio device, characterised by:
a plurality of register-modelled processor means (400, 200, 110A-C, 120, 140, 180) having addressable register means for modelling the virtual state of said register-modelled processor means;
communication means, comprising a wire-line serial bus (230), interconnecting said register-modelled processor means, for communicating between said addressable register means; and
a communication protocol for passing information to or from said addressable register means, comprising an information packet,
whereby the virtual state of said register-modelled processor means may be determined or altered by, respectively, communicating information from or to said register means."
The word in square brackets in Claim 1 is missing from the printed patent, both as regards the claim and the corresponding statement of invention.
V. On 6 April 1994 the Appellant (Opponent) filed a Notice of Appeal against the Opposition Division's decision and paid the prescribed appeal fee. Cancellation of the decision and revocation of the patent were requested, together with oral proceedings prior to any decision not meeting the Appellant's requests in full. A statement setting out the grounds of appeal was subsequently filed on 16 June 1994. In a letter received on 15 December 1994 the Respondent (Patentee) requested that the appeal be dismissed and in the alternative that oral proceedings be held.
VI. In a communication pursuant to Article 11(2) of the Rules of Procedure of the Boards of Appeal, dated 31. July 1995, the Rapporteur raised the question of the interpretation of the independent claims and discussed inventive step having regard to the disclosure of D1.
VII. On 11 September 1995 both parties filed observations in response to the communication. The Appellant cited for the first time the following documents:
D2: WO-A-84/00652, and
D3: CCITT RECOMMENDATION X.25, pages 113 to 115, CCITT, Geneva.
It was argued by the Appellant that the subject-matter of Claim 1 of the patent lacked an inventive step in the light of a combination of D2 and D3. D2 was said to be part of the same patent family as US-A-4 590 473, cited in the patent in suit.
The Respondent discussed the interpretation of the claims and filed, as auxiliary requests, alternative claim sets A and B in which the independent claims were modified so as to emphasize the interpretation of the invention being put forward.
VIII. Oral proceedings were held on 11 October 1995. The Appellant (Opponent) requested that the decision under appeal be set aside and the patent revoked. The Respondent (Patentee) requested that the appeal be dismissed or, in the alternative, that the patent be maintained on the basis of one of alternative claim sets A and B.
IX. At the oral proceedings the Appellant's representative argued that the claimed subject-matter was obvious in view of the disclosure of D1 or alternatively D2, each taken together with D3 which represented the common general knowledge in the art. Starting out from D1, it was argued that the skilled person would appreciate that the radio telephone disclosed in this document included in both the hand-set and the cradle a computer which could be described as register-modelled in the sense used in the claims. The question which arose was whether the skilled person would find it obvious to combine the register-modelled processor means known from D1 with a serial bus. Admittedly in D1 the computers in the hand- set and cradle were connected by way of a four-line parallel bus but the replacement of such a bus by a serial bus was one of the design options available to the skilled person, serial links with distributed processing being well-known per se as exemplified by D3.
It was also argued that the same result could be reached starting out from D2. This document specifically referred to register-modelled architecture and was indeed acknowledged as such in the introduction to the patent in suit. It disclosed register-modelled processor means which could be connected to other such register- modelled processor means by a radio link over which a serial information packet having at least an operation code and an argument was transmitted; this information packet was received by a corresponding device used to perform an operation designated by the operation code and the argument. The only feature of Claims 1 and 8 not known from D2 was the use of a wire-line serial bus/communications link; this was however common general knowledge at the claimed priority date as exemplified by D3. Moreover, the use of a serial bus was acknowledged in the patent in suit as known per se for the connection between the control-head and the basic radio. It was furthermore argued that the correct skilled person in the field in question was not a radio or computer engineer but a systems engineer, the claimed invention merely applying well-known systems techniques to the field of radio transmission.
X. The Respondent argued that D1 did not disclose register- modelled processor means within the sense of the claims; the expression was well-known and understood in the art, as now apparently accepted by the Appellant. D1 moreover did not disclose a serial bus and there was no good reason why the skilled person should modify the arrangement known from D1 both to incorporate register- modelled processor means and a serial bus. D2 disclosed a system which as a whole was register-modelled but did not include components which were individually register- modelled; the document moreover disclosed the use of serial data transmission in the context of a radio network, the individual devices incorporating the usual parallel bus arrangement. A key feature of the patent in suit was that by register-modelling the individual local processors, it was possible to add or remove components without affecting the remainder of the system. Moreover, at the claimed priority date the use of digital techniques in RF systems was in its infancy and the skilled person in the art - the RF design engineer - would not have considered the application of the kind of computer technology made use of in the patent in suit.
Reasons for the Decision
1. The appeal is admissible.
2. Interpretation of Claims 1 and 8
2.1. The Board has had some difficulty in interpreting the expression "register-modelled processor means" used throughout the claims and description, as apparently did the Appellant at the time the appeal was filed. Although no documentary evidence was produced, it was common ground between the parties at the oral proceedings that the expression is indeed a term of art which would be clearly understood by the skilled person. A good definition was said by the Respondent to be given in the decision under appeal at page 3, first full paragraph, in which a register-modelled processor is said to be one which enables its functionality to change while the internal workings remain transparent to the rest of the system. It was stated at the oral proceedings that the technique of register-modelling had originated in the computer field.
The Board now understands the expression "register- modelled processor means" to require the presence of a processor whose internal architecture is so structured that by altering the contents of a register addressed by the processor it is possible to change the processor's mode of operation and thereby select a process to be carried out.
2.2. Claim 1 refers to the processor means "cooperatively operation within the radio device"; it was however clear at the hearing that what was intended was that the processor means are "cooperatively in operation within the radio device" and the claim has been interpreted accordingly, the word in bold - apparently omitted as the result of a clerical error - being shown in square brackets in the version of Claim 1 at point IV above.
3. Admissibility of D2 and D3
3.1. D2 is from the same patent family as US-A-4 590 473, acknowledged in the patent in suit as prior art even though it was not published until after its priority date. D2 is an international application which was published before the priority date.
3.2. Following decision T 536/88 (OJ EPO 1992, 638), "A document indicated in the European patent as the closest or important prior art for the purposes of elucidating the technical problem set out in the description nevertheless forms part of the opposition or opposition appeal proceedings even if not expressly cited within the opposition period". The Board accordingly exercises its discretion to admit D2 to the present proceedings.
3.3. Although D3 is undated it was not contested by the Respondent that it was published before the claimed priority date and that it represents the common general knowledge in the art. The Board sees no reason to doubt this and, since its disclosure is considered uncontentious, has exercised its discretion to admit D3 to the proceedings.
4. Inventive step
4.1. The only document raised in the opposition, and the document on which the Appellant originally based his appeal, is D1. This document discloses a radio telephone consisting of four parts: a hand-set, a cradle, a junction box and a radio. The hand-set includes a computer apparently for control of the push button pad and number display, the cradle also having a computer which apparently operates the main functions of the telephone. Both computers are described as being under "stored program control", the cradle computer inter alia serving to cause data to be entered into a frequency synthesizer within the radio and thus to control the radio frequency. The hand-set and cradle computers communicate with each other by way of four parallel bus lines.
4.2. It was argued by the Appellant that the computers in D1 could be described as register-modelled processor means and that it would be obvious for the skilled person to replace the parallel lines by means of which these computers communicate by a serial line.
4.3. The Board is unable to accept these assertions. The computers known from D1 are each dedicated to a specific function, apparently stored in ROM; their RAM address space is apparently only used for processing data, see Figure 7 of D1. The Board accordingly concludes that D1 does not disclose "register-modelled processor means" as interpreted at paragraph 2.1 above. Moreover, the Board can see no reason why the skilled person would replace the bus lines joining the two computers by a single serial line. These lines merely transfer simple data and the skilled person would have no good reason to adopt the complexity represented by a packet transmission system, such as the X.25 protocol disclosed in D3, in such a context. It was argued by the Appellant that the frequency synthesizer within the radio of D1 could be viewed as register-modelled processor means, in that its frequency was determined by data within a data latch, i.e. a register. No evidence was however produced to show that the frequency synthesizer incorporated a processor as such.
4.4. Turning now to D2, it is evident that this document does indeed relate to the use of register-modelled processor means. It is noted that the patent in suit refers in the introduction at page 3, lines 29 and 30 to prior art having "register-modelled the entire mobile radio system" and cites the US equivalent of D2. D2 itself indicates at page 2, lines 9 to 13 that an object of the invention is to provide "an improved data signalling system which utilises a register model structure". In the D2 system the register-modelled processor is connected to the various peripherals by way of the usual parallel data and address buses but is connected to other devices in the network by a radio link, which implies serial transmission. The data is shown in Figure 2 to have an information word including both an opcode and an argument and is said to be usable to control devices within the network, see page 9, lines 22 to 25 and page 69, sub-paragraph b (iv).
4.5. It is therefore apparent that D2 discloses a method of, and a device for, communicating information to control the operation of a radio device, including a register- modelled processor means for generating an information packet having at least an operation code and an argument. D2 does not however disclose a plurality of such processor means within a single device; in the D2 arrangement each radio device includes one processor means, the devices communicating with each other over the radio network by means of the information packets. In the claimed arrangement, on the other hand, the various components of a single device communicate by means of information packets over a wire-line serial link. Even if the basic principle of a serial data link was common general knowledge at the claimed priority date it does not follow that the skilled person, starting out from D2, would consider modifying it to provide for internal serial communication. Moreover, even if for the sake of argument the skilled person were to abandon the known parallel bus arrangement of D2 for a serial bus he would still not arrive at the claimed arrangement, which requires a plurality of register- modelled processor means in a single device.
4.6. The Board accordingly concludes that the subject-matter of Claims 1 and 8 of the main request involves an inventive step. It has not therefore been necessary to consider alternative claim sets A and B presented by the Respondent.
For these reasons it is decided that:
The appeal is dismissed.