|European Case Law Identifier:||ECLI:EP:BA:2001:T061696.20010705|
|Date of decision:||05 July 2001|
|Case number:||T 0616/96|
|IPC class:||H01L 21/285|
|Language of proceedings:||EN|
|Download and more information:||
|Title of application:||Fabricating electrical contacts in semiconductor devices|
|Applicant name:||STMicroelectronics Limited|
|Relevant legal provisions:||
|Keywords:||Inventive step (yes) - no reasonable expectation of success - prior art teaching leading away from the claimed process|
Summary of Facts and Submissions
I. European patent application No. 90 302 870.2 was refused by a decision of the examining division dated 26. February 1996. The ground for the refusal was that the subject-matter of claims 1 to 6 as amended according to the applicant's request dated 27 May 1994 did not involve an inventive step having regard to the prior art documents
D1: US-A-4 784 973
D2: Patent Abstracts of Japan, vol. 11, no. 195 (E 518) 23 June 1987 & JP-A-62 022437
II. The reasoning of the examining division in the decision under appeal can be summarized as follows:
(a) A method of fabricating an electrical contact in a semiconductor device according to the preamble of claim 1 is known from document D1 (cf. column 1, lines 53 to 65; column 4, lines 7 to 65; column 5, lines 12 to 18; figures 1 and 3). The method of claim 1 differs from this known method in that the interlevel dielectric material is reflowable and in that the dielectric material is reflowed and the oxide control layer is grown in a single step. Having regard to these differences, the objective problem solved by the invention was to provide a method which enhances step coverage. The skilled person knows, however, that the use of a reflowable interlevel dielectric improves the step coverage by easing the slope of the contact opening sidewalls (cf. document D2, abstract). He would thus replace the interlevel dielectric used in document D1 by a reflowable material. Due to the temperature range used in the method of document D1 during the oxide growth step, reflow of the interlevel dielectric and growth of the oxide control layer would automatically occur in a single step.
(b) In document D1 a conventional furnace tube or a rapid thermal processor are presented as equivalent options for growing the oxide control layer (cf. D1, column 4, lines 4 to 10). Consequently, a skilled person would consider the use of a rapid thermal processor with a reasonable prospect of success. Experimentation would still be necessary to find out the optimal reflow while keeping the thickness of the control layer in the required range. This experimentation would inevitably lead to the parameters disclosed in the present application.
III. The appellant (applicant) lodged an appeal on 25 April 1996. The appeal fee was paid on the same date. The statement setting out the grounds of appeal was filed on 26 June 1996.
IV. In a communication dated 21 March 2001 the Board expressed its provisional opinion that the expression "in a single step" used in claim 1 was not clear (Article 84 EPC), since the expression "a step" had no precise meaning and might comprise any number of substeps. Also, an English translation of JP-A-62 022437 (D2), hereinafter D2a, was introduced into the proc eedings by the Board.
V. In response, the appellant filed with his letter dated 27. April 2001 a new main request and an auxiliary request, each request consisting of claims 1 to 6. With letter dated 23 May 2001 a clean copy of claims 1 to 4 of the main request and new pages of the description were filed.
Independent claim 1 in accordance with the main request reads as follows:
"1. A method of fabricating an electrical contact in a semiconductor device, the method comprising the steps of:
(a) providing on an underlying silicon substrate (2) an interlevel dielectric material (14) having a contact opening (16) exposing a contact region (18) of the silicon substrate (2);
(b) heating the silicon substrate (2) and the interlevel dielectric material (14) by a rapid thermal anneal in an oxygen-containing atmosphere thereby to grow a diffusion barrier oxide control layer (20) in the contact region (18);
(c) depositing a layer of transition metal (28) over the dielectric material (22) and the oxide control layer (20); and
(d) heating the structure to convert at least part of the transition metal layer (28) into a metallurgic diffusion barrier (30);
characterised in that said interlevel dielectric material (14) is reflowable and in step (b) said dielectric material (14) is reflowed and said oxide control layer (20) is grown simultaneously."
VI. The appellant requests that the decision under appeal be set aside and a patent be granted on the basis of a main request as follows or an auxiliary request.
Claims: 1 to 4 filed with the letter dated 23. May 2001 5. and 6 filed with the letter dated 27. April 2001
Description: page 1 as originally filed pages 2, 5, 6 and 8 to 10 as filed with letter of 27 May 1994 pages 3, 3a, 4 and 7 as filed with letter of 23 May 2001
Drawings: Sheet 1/1 as originally filed.
Reasons for the Decision
1. The appeal is admissible.
2. Amendments (Article 123(2) EPC)
Claim 1 according to the main request differs from claim 1 as filed essentially in that it specifies that:
(i) the oxide control layer (20) is a diffusion barrier oxide control layer, and
(ii) the dielectric material is reflowed and the oxide control layer is grown simultaneously instead of in a single step.
These amendments are based on page 9, lines 6 to 8 and on the paragraph bridging pages 6 and 7 of the originally filed application, respectively.
The description has been amended to acknowledge the relevant prior art and to be consistent with the amended claim.
Thus, the application as amended complies with Article 123(2) EPC.
3. Inventive step (Article 56 EPC)
3.1. It is not in dispute that document D1 represents the closest prior art.
This document discloses a method for establishing an electrical contact to a silicon substrate and for forming a metallurgical barrier on this contact. The contact opening (21) is etched through a relatively thick dielectric layer (20) overlying the silicon substrate (10), wherein the dielectric layer is made of a non-reflowable material (cf. D1, column 3, lines 53 to 65 and Figure 1). The metallurgical barrier prevents that aluminum, which is the material usually employed for forming the interconnects on integrated circuits, may diffuse into and dissolve parts of the silicon substrate causing the so-called "spiking" phenomenon, which may short-circuit a PN junction (cf. D1, column 1, lines 7 to 25). The metallurgical barrier is made of a titanium nitride layer. Prior to the teaching of D1, a titanium layer was deposited directly on the exposed surface of the silicon substrate. This layer was then reacted during a thermal cycle in a nitrogen atmosphere to form titanium nitride. However, unwanted titanium silicide was also formed during this thermal cycle and the formation rates of titanium silicide and titanium nitride could not be controlled individually (cf. D1, column 1, lines 27 to 66). To solve this problem, document D1 teaches that a diffusion barrier oxide control layer (22) should be formed on the contact opening before the titanium layer (24) is deposited (cf. D1, Figure 2). The oxide control layer is formed in a reactive thermal cycle at a temperature between 700 and 1100 C in a conventional furnace tube or a rapid thermal processor (cf. D1, column 4, lines 4 to 30). The thickness of the oxide control layer, about 20. to 50 Angstroms, has to be carefully controlled, since it is consumed during the further thermal treatment which forms the titanium nitride layer. At the same time, the oxide control layer retards the rate of diffusion of silicon into the titanium, reducing thus the amount of titanium silicide formed (cf. column 2, lines 31 to 34; column 5, lines 19 to 45).
3.2. The Board therefore agrees with the finding in the decision under appeal that the method according to claim 1 of the main request differs from the method disclosed in document D1 in that
(i) the interlevel dielectric material is reflowable and in that
(ii) the dielectric material is reflowed and the oxide control layer is grown simultaneously.
3.3. According to the present application, wherein document D1 is acknowledged, the use of a reflowable interlevel dielectric material improves the step coverage of the titanium layer and of the aluminum interconnect and thus increases the overall reliability of the contacting process (cf. the application in suit, page 2, last paragraph and the paragraph bridging pages 6 and 7; page 10, 1st paragraph; Figures 3 and 5). By carrying out simultaneously the reflow of the dielectric material and the growth of the oxide layer the handling associated with two separate processes is avoided and the cleanliness and efficiency of the fabrication process is enhanced (cf. ibid., page 9, 4th paragraph; page 10, 1st and 2nd paragraph). Furthermore, the performance as diffusion barrier of the titanium nitride layer is improved by the simultaneous processing step of growth and reflow, since the optimisation of the contact profile reduces the ratio of unreacted titanium to aluminum alloy in the contact region, avoiding the mechanism for aluminum and silicon interdiffusion (cf. ibid., the paragraph bridging pages 10 and 11).
Consequently, the objective problem addressed by the present application can be regarded as improving the efficiency and reliability of the process of fabricating an electrical contact as known from document D1.
3.4. In the decision under appeal, it is argued that document D2 discloses a method for making an electrical contact on a semiconductor wafer in which an interlevel dielectric made of a reflowable glass is used.
Indeed, document D2a discloses such a process (cf. D2a, page 3, last paragraph and pages 4 to 5, 'Example of practice'). In a first step, a contact hole (14) is opened in the reflowable interlevel dielectric material (13) which has previously been deposited on the substrate (11) (cf. D2a, Figure 1(a)-(b)). A layer of oxide (15) is then grown in the contact hole by heating the wafer in a conventional furnace. The wafer is introduced into the furnace at a temperature of about 800 C and the temperature is slowly allowed to raise up to 900 C in about 20 minutes (cf. D2a, Figure 2). In this temperature range an oxide layer grows in the contact hole, but no reflow of the dielectric material occurs (cf. D2a, page 4, 5th paragraph and Figure 1(c)). The atmosphere inside the furnace is changed to an inert atmosphere once a temperature of 900 C has been reached. This prevents further oxide growth while the interlevel dielectric is reflowed (cf. D2a, Figure 1(d) and Figure 2). The reason for preventing further growth of the oxide layer is that this layer is to be removed after the reflow step so that the electric contact can be directly done to the underlying silicon substrate (cf. D2a, Figure 1(e)-(f)). A thin oxide layer can be removed more easily than a relatively thick one (cf. D2a, page 5, 2nd paragraph).
The oxide layer should be formed, according to this document, before reflowing the interlevel dielectric to prevent outward diffusion of impurities such as phosphorus, arsenic or boron from the interlevel dielectric into the unprotected contact region of the semiconductor wafer (cf. D2a, page 3, 2nd, 3rd and last paragraph and the paragraph bridging pages 5 and 6). The protective effect is achieved by an oxide thickness of 100 to 200 Angstroms (cf. D2a, page 5, 1st paragraph).
3.5. It is to be noted that, although in document D2a the oxide layer is grown and the interlevel dielectric is reflowed, this is not done simultaneously.
Furthermore, the oxide layers grown respectively in the contact opening in documents D1 and D2a serve different purposes: in the first case, the oxide layer is not removed, but remains in place and is consumed during the contacting process helping the formation of the metallurgical barrier; in the second case, it is removed before the electric contact is made. The problems associated with the method of making an electric contact according to document D2a are discussed in document D1 with respect to the "spiking" phenomena (a direct contact between aluminum and silicon).
Moreover, the thickness of 100-200 mentioned in document D2a for the oxide layer is about five to ten times larger than the preferred thickness of about 20 mentioned in document D1. In the Board's view such a thick oxide layer would not be suitable in the method disclosed in document D1, as the oxide would not be completely consumed during the formation of the titanium nitride. An oxide layer would thus remain, increasing the resistance of the electric contact.
3.6. The Board agrees with the appellant that document D1 does not teach processing conditions that would lead automatically to reflow of the dielectric material, even if one would have been used. This document only discloses processing conditions which enable a thin diffusion barrier control layer to be grown. There is no motivation for a skilled person to arbitrarily modify the processing conditions disclosed in this document as suggested by the examining division to perform oxide growth and reflow the interlevel dielectric material at the same time. A skilled person would instead consider employing a separate reflow step, entirely distinct from the reactive thermal cycle disclosed in document D1, because this document makes clear that the reactive thermal cycle is controlled to achieve a thickness of about 20 Angstroms for the control layer.
3.7. Moreover, the teaching of document D2a would lead a skilled person away from performing oxide growth and reflow simultaneously, since according to the teaching of the document, the protective oxide layer has to be formed prior to the reflow so as to prevent diffusion of impurities from the dielectric into the contact opening. Although the time taken for oxide growth and reflow in a rapid thermal processor would be much shorter than the time required for the same process in a conventional furnace, a skilled person had no reasons to ignore the teaching of document D2a.
3.8. The Board thus cannot see a reasonable expectation of success derivable from the state of the art that a process in which oxide growth and reflow are performed simultaneously would achieve the expected improvement of the reliability of the contacting process. On the contrary, following the teaching of document D2a he would provide the oxide layer prior to the reflow of the interlevel dielectric. The reasoning of the examining division was based on an ex-post facto analysis in which only one feature (the use of a reflowable material) was taken from the disclosure of document D2a without having regard to its whole content.
3.9. For the foregoing reasons, a skilled person faced with the technical problem of improving the method known from document D1 would not be induced by the teaching of document D2a to reflow the interlevel dielectric and grow the control oxide layer simultaneously.
4. In the Board's judgement, therefore, the subject-matter of claim 1 of the main request involves an inventive step in the sense of Article 56 EPC and accordingly meets the requirements of Article 52(1) EPC.
Dependent claims 2 to 6 of the main request concern further particular embodiments of the invention which are patentable for the same reasons.
For these reasons it is decided that:
1. The decision under appeal is set aside.
2. The case is remitted to the department of the first instance with the order to grant a patent on the basis of the documents as specified under item VI. above.