T 1217/10 () of 17.4.2015

European Case Law Identifier: ECLI:EP:BA:2015:T121710.20150417
Date of decision: 17 April 2015
Case number: T 1217/10
Application number: 05821343.0
IPC class: G06K 9/00
Language of proceedings: EN
Distribution: D
Download and more information:
Decision text in EN (PDF, 289.119K)
Documentation of the appeal procedure can be found in the Register
Bibliographic information is available in: EN
Versions: Unpublished
Title of application: AN INTEGRATED IMAGE PROCESSOR
Applicant name: Intel Corporation
Opponent name: -
Board: 3.4.01
Headnote: -
Relevant legal provisions:
Rules of procedure of the Boards of Appeal Art 13(1)
Rules of procedure of the Boards of Appeal Art 12(2)
Rules of procedure of the Boards of Appeal Art 15(3)
Rules of procedure of the Boards of Appeal Art 15(6)
Keywords: Late-filed request - change of subject-matter
Statement of grounds of appeal - party's complete case
Catchwords:

-

Cited decisions:
-
Citing decisions:
-

Summary of Facts and Submissions

I. The appeal lies from the decision of the examining division to refuse European patent application number 05 821 343.0.

II. The examining division refused the application because claim 1 of the main request on file at that time was held to lack inventive step. Each version of claim 1 of the respective auxiliary requests was held to include added subject-matter and/or to lack clarity.

III. With the statement setting out the grounds of appeal, the appellant requested that the decision under appeal be set aside and that a patent be granted on the basis of one of three sets of claims filed with the statement of grounds and forming the basis of a main request and first and second auxiliary requests.

IV. A summons to oral proceedings, to be held on 17 April 2015, was issued on 14 November 2014.

V. In a communication of the Board dated 17 December 2014, objections were raised against the independent claims of all requests under Article 123(2) EPC and Articles 83 and 84 EPC 1973. In view of said objections, the questions of novelty and inventive step were addressed only briefly. The following documents were referred to:

D2: US-A-5 557 684;

D8: ODA K. et al., "A video-rate stereo machine and its application to virtual reality"; Proceedings of the 1996 International Society for Photogrammetry and Remote Sensing Conference (ISPRS '96) 1996, XP009110596.

VI. In response to the Board's communication, by letter of 24 March 2015, the appellant filed two sets of claims forming the basis of a new main request and a new auxiliary request.

VII. In a letter dated 16 April 2015, received on the same day by fax, the representative of the appellant informed the Board that no-one would attend the oral proceedings.

VIII. Oral proceedings were held on 17 April 2015 in the absence of the appellant.

IX. Claim 1 of the main request reads:

"A system for image processing comprising:

an input interface (102) configured to receive pixel data from two or more images;

a rectify processor (404) to remove lens distortion from each of the two or more images and correct for geometric misalignment between each of the two or more images;

a disparity processor (406) to calculate a disparity of pixels from the two or more images by correlating pixel data between the two or more images;

a foreground detector (306) to determine which pixels are part of a foreground and to use one bit for each pixel to indicate whether the pixel is in the foreground or not; and

a segmentation processor (310) to identify a plurality of objects of interest in an image by using edge detection filters to detect areas in a top or plan view projection that represent said objects."

Claim 1 of the auxiliary request reads:

"An integrated image processor implemented on a substrate comprising:

an input interface (102) configured to receive pixel data from two or more images; and

a pixel handling processor disposed on the substrate configured to convert the pixel data into depth and intensity pixel data; and

a foreground detector processor (306) disposed on the substrate configured to classify pixels as background or not background, further comprising:

a rectify processor (404) to remove lens distortion from each of the two or more images and correct for geometric misalignment between each of the two or more images;

a disparity processor (406) to calculate a disparity of pixels from the two or more images by correlating pixel data between the two or more images; and

a segmentation processor (310) to identify a plurality of objects of interest in an image by using edge detection filters to detect areas in a top or plan view projection that represent said objects, wherein the foreground detector (306) uses one bit for each pixel to indicate whether the pixel is in the foreground or not."

Both requests contain dependent claims 2 to 11.

Reasons for the Decision

1. The appeal is admissible.

2. Admissibility of the new requests

2.1 In accordance with Article 12(2) of the Rules of Procedure of the Boards of Appeal (RPBA), the statement of grounds of appeal shall contain a party's complete case.

2.2 In the present case, the statement of grounds of appeal included three sets of claims which were filed as a main request and first and second auxiliary requests. The independent claims of each of these requests were directed to "An integrated image processor comprising a plurality of integrated circuit blocks implemented on a substrate in a pipeline architecture". The independent claims in all of these requests then went on to define that the various processing blocks each require only a subset of the image information from the previous block so that the processing blocks "are processing in parallel at the same time pixel data from the same frame period".

The appellant submitted that the amended claims overcame the clarity and added-matter objections of the contested decision. Moreover, the appellant explained why the independent claims of each of the requests was considered to be inventive. Specifically, the arguments contained in the statement of grounds of appeal focused on the pipeline architecture and it was submitted that each integrated circuit block was adapted to require only a subset of image information for each frame period so that a plurality of the integrated circuit blocks were able to process pixel data from the same frame period in parallel. The invention enabled "each block to process separately the pixel stream which passes serially between the blocks". This was presented as being "particularly unique to the invention" and having "the advantage of allowing the invention to operate with lower latency because each block is able to produce an output from a particular section of the pixel stream and does not need to wait for all the information from a whole frame of an image before it is able to pass on its output to the next block" (see the statement of grounds, page 2, last full paragraph). Thus the pipeline architecture defined in the independent claims of each request meant that, in comparison to the prior art, less memory was required and the processing was much faster.

The case presented in the statement of grounds of appeal was therefore that, in order to solve the problems which were identified on page 1 of the application (i.e. computationally intensive processing, substantial latency and large output arrays), the processing blocks had to be arranged in a pipeline architecture and each block must be adapted to require only a subset of the image information from the previous processing block.

2.3 In response the Board's communication of 17 December 2014, two new sets of claims were filed corresponding to a new main request and a new auxiliary request.

In the independent claims of these requests, all references to the pipeline architecture and to the parallel processing capability have been removed.

Instead, the independent claims of both requests now refer to "a segmentation processor (310) to identify a plurality of objects of interest in an image by using edge detection filters to detect areas in a top or plan view projection that represent said objects".

In the letter dated 24 March 2015 accompanying these new requests, the appellant submitted that this feature distinguished the subject-matter of the independent claims from the prior art. In comparison to D8, which detected different areas of an image by detecting motion of objects on a pixel-by-pixel basis, the use of edge detection filters "achieves image processing by a simpler and hence faster and more efficient means and uses less resources such as processing power and memory".

2.4 In accordance with Article 13(1) RPBA, "Any amendment to a party's case after it has filed its grounds of appeal ... may be admitted and considered at the Board's discretion".

2.5 From the above it can be seen that the case which the appellant submitted in response to the Board's communication is in fact totally different to the case submitted in the statement of grounds of appeal. Specifically, the features which the appellant insisted were those that solved the problems of computationally intensive processing, substantial latency and large output arrays have been abandoned in the independent claims of both current requests. Instead, the appellant now relies upon the provision of a segmentation processor to establish the inventive step.

Since the independent claims of the current requests are not restricted forms of those filed with the statement of grounds of appeal, the amendments do not cause the procedure to converge but instead have created a fresh case. In fact, the arguments submitted in the statement of grounds of appeal with regard to inventive step relate to features which no longer appear in the independent claims.

2.6 The Board notes that claim 1 of the second auxiliary request which was filed with the statement of grounds of appeal included "a segmentation processor ... configured to compute from the output of the projection generator a list of zero or more individual object descriptions, wherein one description of the list comprises a 3D location and a 3D physical extent". Nevertheless, the pipeline architecture and the parallel processing capability were also present in this claim and it was the pipeline architecture which the appellant consistently relied upon as the solution to the problems identified on page 1 of the application. The segmentation processor was not even mentioned in the statement of grounds and was never presented as playing any role in solving the identified problems.

2.7 In view of the fact that the invention has been re-defined and is now directed to an aspect which was never mentioned in the statement of grounds - which, in accordance with Article 12(2) RPBA, should have contained the appellant's complete case - the Board has exercised its discretion not to admit the present requests into the proceedings.

3. Since the previous requests have been replaced by the present requests which have been found to be inadmissible, there is no longer any request to consider.

4. Non attendance at the oral proceedings

4.1 The appellant was duly summoned to oral proceedings. The representative of the appellant informed the Board on 16 April 2015 that no-one would be attending the oral proceedings on the following day. Consequently, the oral proceedings were held in the absence of the appellant.

4.2 Article 15(3) RPBA stipulates that the Board is not obliged to delay any step in the proceedings, including its decision, by reason only of the absence at the oral proceedings of any party duly summoned who may then be treated as relying only on its written case.

4.3 In the Board's judgement, the appellant could have foreseen that any new request would be subject to examination of its admissibility. By not attending the proceedings the appellant effectively chose not to avail itself of the opportunity to present comments orally before the Board but instead to rely on its written case (Article 15(3) RPBA).

4.4 In the present case, the Board was in a position to announce a decision at the conclusion of the oral proceedings as foreseen by Article 15(6) RPBA.

Order

For these reasons it is decided that:

The appeal is dismissed.

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