T 1120/03 (Modulating device/NEC) 03-11-2004

1. Admissibility of D6a, D6c, D7 and D15

1.1. In accordance with Article 114(2) EPC, the board may disregard facts or evidence which are not submitted in due time. In the present case, D6a, D6c and D7 were filed on 23 April 1997 during the first opposition proceedings before the opposition division. D15 on the other hand was filed with the statement of grounds in the present appeal proceedings and was received on 18. December 2003, i.e. more than seven years after the grant of the patent in suit. No specific reasons were put forward by the appellant to justify the filing of D15 at such a late stage. The appellant however considered D15 more relevant than any of the other documents on file and particularly referred to the prior art as illustrated in Fig. 2 of D15, which was said to be prima facie highly relevant. The structure of the transversal filters shown in this figure (see also D15, col. 2, lines 9 to 37) appears however very similar to that of the waveform shaping apparatus of Fig. 1 in D2, which also constitutes a transversal filter, so that on a preliminary study it does not appear to the board that D15 is more pertinent than any of the other documents already on file.

1.2. The board observes that in the notice of opposition only two prior art documents were cited, further documents having been added piecemeal in the course of the opposition and first appeal proceedings so that the total number of documents cited by the appellant now amounts to thirteen, all in respect of claim 1 as granted.

1.3. In view of the above, the board, in exercising its discretion pursuant to Article 114(2) EPC, decided to admit D6a, D6c and D7, but not D15.

2. Interpretation of claim 1 as granted

2.1. Claim 1 refers to variables n and m, which do not constitute reference signs within the meaning of Rule 29(7) EPC. The board therefore interprets the following features of claim 1, including the parts in parentheses, to be part of the matter for which protection is sought:

"m (integer equal to or smaller than n) data signals"; "G (larger than m) data signal streams"; "B (equal to or larger than m) data streams"; and "A (larger than m) bits". Both parties accepted this interpretation of claim 1.

2.2. The reference to two filters which "are each comprised of digital filters (22a, 22b) ...", see claim 1, lines 28 to 29 and 34 to 35 (reference is made to the patent as published), is understood to mean that each of the filters comprises a digital filter. This interpretation is in line with the references in the claims to "said two digital filters (22a, 22b)", see claim 1, line 42, and claim 2, lines 56 to 57, and is consistent with the embodiment as shown in Figs. 2 and 3. of the patent.

2.3. Claim 1 does not specify whether the shift registers have parallel and/or series input- and/or output- terminals. The term "n-bit shift registers" (claim 1, line 46) is therefore arguably ambiguous and is interpreted by the board as defining shift registers, each of which has n delay elements for storing n bits. Further, since each filter is for filtering input parallel n-bit data streams, n >= 2. In the embodiment according to Fig. 2 of the patent, n is equal to 8 and the shift registers SR1 to SR5 each have eight parallel inputs and eight parallel outputs and are capable of storing and shifting in parallel an 8-bit data sequence (see col. 3, lines 35 to 39).

2.4. At the oral proceedings, the respondent argued that, since in claim 1 reference is made to "m ... data signals" with "signals" in plural, it followed that m must be at least equal to two. The board does not accept this argument and considers that the natural sense of the expression includes a single data signal. In line with this interpretation, the expression "multi-level" in "multi-level signals P and Q" (claim 1, line 32) is understood as to also include two-level signals, i.e. binary signals. Applying such a binary data signal at each of the inputs of the digital filters, which corresponds to m = 1, results in a four- level quadrature amplitude modulation (4 QAM).

3. Inventive step

3.1. At the oral proceedings before the present board it was common ground between the parties that D14 (see Fig. 1 and the table on page 344) disclosed a modulating device including a quadraphase modulator for producing a quadrature amplitude modulated (QAM) wave in response to multi-level signals at the two modulator input channels, commonly referred to in the art as P and Q channels. Fig. 2 illustrates the signal or channel shaping in each of the channels by means of digitally implemented binary transversal filters (BTF's), see also Fig. 1 and page 347, line 6. The binary transversal filters include T/2 spaced shift registers (SR's) and a weighting network followed by a D/A converter. For 16 QAM, two chips are used in parallel, each containing two 16-stage shift registers providing 16. taps (page 348, lines 1 to 3, page 347, lines 23 to 32, and Fig. 3 ("N taps")). Hence, for 16 QAM, each of the P and Q channels is provided with a digital filter having two data input signals (corresponding to m = 2) and having two 16-stage shift registers, each, using the terminology of the patent in suit, being a 16-bit shift register.

3.2. In order to implement the modulator unit according to D14, Figs. 1 and 2, the skilled person would require further information about binary transversal filters and, in particular, the weighting network, since the only relevant information given in D14 in this respect is that the weighting network is resistive (page 347, lines 19 to 20). The skilled person would find relevant information in D2, which discusses the basic binary transversal filter and also relates to signal shaping in a data transmitting system using a shift register and a weighting network (D2, Figs. 1 and 2). More specifically, Fig. 1 of D2 illustrates the waveform shaping apparatus 11 of the data transmitting-receiving system of Fig. 2. The weighting network includes a group of multipliers 21 to 24, each for multiplying a single data stream by a 3-bit weighting coefficient, and an adder 3 for adding the outputs of the multipliers to produce three bit data signal streams (cf. col. 5, lines 55 to 60). The digital outputs are subsequently converted into an analog signal by D/A converter 12 (Fig. 2). The waveform shaping apparatus 11. thus constitutes a binary transversal filter (BTF) including one 4-stage shift register with 4 taps, four multipliers and an adder. Furthermore, since the filter has a one-bit data stream input and has a finite impulse response (FIR), as follows from, e.g., Fig. 3F illustrating the filter response to a "1" input signal (see D2, col. 3, lines 35 to 37), it constitutes a one- bit FIR-filter.

3.3. If the skilled person were to employ the binary transversal filter of D2 in the modulator unit of D14 then, for example, 16 QAM would result in each of the digital filters including two 16-stage shift registers for two input parallel data streams including two data signals (corresponding to n = m = 2). Each digital filter would further include two groups of sixteen multipliers, and two adders which together provide at least six data signal streams (corresponding to G >= 6) which are subsequently converted by the D/A converter shown in Fig. 1 of D14 into a 4-level analog P or Q signal for 16 QAM. The weighting coefficients of the multipliers would have three bits each (corresponding to A = 3) and corresponding multipliers of the two shift registers would together multiply two data streams. Further, each adder would add the outputs of sixteen multipliers.

3.4. However, the resultant modulating device would not fall within the scope of claim 1 of the patent in suit. To arrive at the claimed modulating device the skilled person would need to modify each digital filter further, by replacing the two 16-bit shift registers by a number of, e.g. sixteen, 2-bit shift registers, since n = 2, thereby doing away with the one-bit binary transversal filters. It would also be necessary for each multiplier to multiply two data streams (since m = 2, and, hence, B is at least 2), which the skilled person could, for example, achieve by replacing each pair of corresponding multipliers by one multiplier having two data streams at the input, and to provide a single adder for adding the outputs of all thirty-two multipliers, for example by replacing the two adders by one.

3.5. In the board's view, the various steps required lead to the conclusion that the skilled person using the filter of D2 in the modulating device of D14 would not arrive at the subject-matter of claim 1 without the exercise of inventive skill.

3.6. The appellant argued that multi-bit FIR-filters, each including a plurality of shift registers connected in parallel for shifting input parallel bit data streams, were well-known at the priority date of the patent in suit. Indeed, the patent specification stated that the digital filters used were commercially available (col. 3, lines 25 to 27). The appellant also referred to D6a, Fig. 4a and D7, Fig. 3, which allegedly documented the relevant common general knowledge.

Further, it was argued that such a multi-bit FIR-filter was well-known as being an obvious equivalent of a plurality of BTF's in parallel; their logical operations were mathematically the same and, at the circuit level, a series of shift registers each having n parallel inputs was identical to n BTF shift registers in parallel.

Consequently, a person skilled in the art would replace the two BTF's including 16-bit shift registers, as obtained by combining D14 and D2, by a 2-bit FIR-filter including sixteen 2-bit shift registers and make the appropriate adaptations to the multipliers and the adders. The skilled person would thereby arrive at the subject-matter of claim 1 without applying any inventive skill.

The board does not find these arguments convincing. The respondent has disputed that the digital filters in accordance with claim 1 were part of the common general knowledge of a person skilled in the art at the priority date; although in the patent specification it was stated that these filters were commercially available (col. 3, lines 25 to 27 and col. 4, lines 34 to 37), the respondent has now resiled from this acknowledgement and argued that it was not based on specific known prior art but on the inventor's erroneous presumption. The board therefore gives no weight to the acknowledgement and, consequently, does not consider the digital filters described in the patent specification to form part of the state of the art within the meaning of Article 54(2) EPC, in the absence of proof to the contrary. As noted above, the appellant referred to D6a, Fig. 4a and D7, Fig. 3. More specifically, Fig. 4a of D6a was considered to illustrate a multi-bit FIR-filter, since the input signal was a series of digital words, each consisting of several bits, also indicated as a "Signalvektor" (D6a, page 72, right-hand col., penultimate line).

However, it is noted that the term "Signalvektor" does not refer to these digital words, but to a series of thirty-two bits as stored in the N (= 32) delay elements T of the shift register shown in Fig. 4a, as follows from equation 3) on page 72. Further, as follows from Fig. 1 of D6a, the FIR-filter of Fig. 4a has a single digital input signal x(n), i.e. a single data stream, and there is no suggestion in the document that the digital words are applied in parallel to the FIR-filter. If, for the sake of argument, the digital words were to be applied in parallel, the skilled person would arrive at an implementation in which several one-bit FIR-filters, each as shown in Fig. 4a, are used in parallel. The above considerations apply mutatis mutandis to the transversal filter shown in Fig. 3 of D7, see Fig. 1 which illustrates the single quantised signal xq(kT) as referred to in Fig. 3. Hence, neither D6a nor D7 shows that at the priority date of the patent in suit a multi-bit FIR-filter was well- known and, furthermore, known as an obvious equivalent of a plurality of BTF's in parallel.

3.7. The appellant additionally argued that the subject- matter of claim 1 was obvious in view of D14 alone in the light of the common general knowledge at the priority date; it would be a matter of routine for a person skilled in the art to consider alternative implementations of the digital filters of D14, in particular those using multi-bit FIR-filters.

However, in the absence of evidence convincingly showing that at the priority date of the patent in suit a multi-bit FIR-filter was well-known and, furthermore, known as an obvious equivalent of a plurality of BTF's, the application of such filters to the modulator unit of D14 cannot, in the board's view, be considered obvious to a person skilled in the art.

3.8. At the oral proceedings, the appellant additionally argued that the combination of D14 and D2 suggested a 4 QAM modulating device having in each channel a single BTF including a single shift register, which would fall within the scope of claim 1.

The board does not accept this argument. It is noted that D14 is concerned with high-level QAM, i.e. 16, 64 or 256 QAM (see, e.g., the table on page 344; page 346, point 2.a); page 347, lines 28 to 32; and page 348, lines 1 to 3). If, for the sake of argument however, it were assumed that D14 does suggest a 4 QAM modulator unit, the application of the teaching of D2 to D14 would result in a modulating device for 4 QAM, corresponding to m = 1, including in each channel a binary transversal filter for digitally processing one input bit data stream, corresponding to n = 1. Each BTF would include a single 16-stage shift register, i.e. a single 16-bit shift register having 16 taps (cf. D14, page 348, line 2, and Fig. 3). However, the board notes that according to claim 1 n >= 2 (see point 2.3) and each digital filter includes n-bit shift registers, i.e. more than one. Further, the use of a 16-bit shift register in such a combination would imply that n = 16, whereas, since there is only one input data stream, n = 1. Neither D14 nor D2 suggests 16 input data streams for 4 QAM, which would be in line with n = 16, and the board considers that the skilled person would have no reason to provide such multiple inputs. It follows that the combination of D14 and D2 in a 4 QAM application does not lead to the modulating device as claimed in claim 1.

3.9. Turning now to the alternative feature in claim 1, line 51 of the patent as published, according to which each digital filter comprises an adder for adding outputs of the shift registers instead of outputs of the multipliers (see also the description, col. 4, lines 34 to 42), the appellant referred to Fig. 4 of D6c and argued that it would be obvious for a person skilled in the art to apply the multi-bit filter structure as shown in this figure to the system of D14.

The board notes however that according to D14, Fig. 2, binary transversal filters are used in which the weighting network is positioned after the shift registers. A person skilled in the art would therefore not take into consideration the teaching of D6c, Fig. 4, which, at the most, suggests a weighting by multiplication factors before the step of shifting the multi-bit data streams. Furthermore, the multi-bit data streams are not suitable for use with binary transversal filters as used in D14, since these filters require, as acknowledged by the appellant, a single bit data stream (cf. the statement of grounds, page 5, lines 1 to 8).

3.10. The board therefore concludes that the subject-matter of claim 1 cannot be considered obvious to a person skilled in the art having regard to either D14 alone or D14 in combination with D2, in each case supplemented by the common general knowledge as documented by D6a, D6c and D7.

3.11. The appellant additionally argued that starting from the teaching of D7 in combination with the teaching of D14, the subject-matter of claim 1 lacked an inventive step. It was argued that Fig. 6a of D7 illustrated a QAM system in which the filter structure g(kT) in each of the input channels of the QAM modulator corresponded to the filter of Fig. 3. Admittedly, the D/A-conversion took place after the modulation and combination of the QAM components, whereas according to claim 1 the D/A- conversion took place before the modulation; the teaching of D14 would however lead the skilled person to perform the D/A-conversion before the modulation and combination steps.

The board does not find these arguments persuasive. Firstly, D7 does not provide any details of the digital filters g(kT) shown in Fig. 6a. Hence, there is no basis for the assumption that these filters each correspond to the transversal filter shown in Fig. 3. Secondly, the output signals ai and bi of the coder of Fig. 6a are not parallel bit data streams giving rise to more than one data signal stream at the output of each of the filters g(kT). The board therefore concludes that the subject-matter of claim 1 is not obvious having regard to D7 in combination with D14.

3.12. For these reasons, the board concludes that the subject-matter of claim 1 of the main request involves an inventive step having regard to the prior art cited by the appellant.

4. Since the respondent's main request is found allowable, it has not proved necessary to consider the auxiliary requests.

5. Apportionment of costs

During the previous appeal proceedings in the present case (T 868/99), the respondent had requested that, in view of the late filing of document D14 by the appellant, there be an apportionment of costs of the oral proceedings held on 13 September 2001 before Board 3.5.1. in favour of the respondent. The board did not order the requested apportionment of costs and stated in point 4 of its reasons:

"Both parties have thus contributed to it not being expedient for all the issues necessary for giving a final decision in the case being dealt with at the oral proceedings on 13 September 2001 before the Board. In these circumstances, the Board does not consider that there are reasons of equity for ordering an apportionment of the costs relating to these oral proceedings different from the normal situation before the EPO that each party must itself pay the costs it has incurred."

Article 111(2) EPC provides that, if a board of appeal remits a case for further prosecution to the department whose decision was appealed, that department shall be bound by the ratio decidendi of the board of appeal, in so far as the facts are the same. This res judicata effect also limits the power of a board of appeal in the framework of a subsequent appeal proceedings (T 79/89, OJ EPO 1992, 283, point 3; T 694/01, OJ EPO 2003, 250, point 2.8).

It follows from the above that the issue as to whether the late filing of document D14 justifies an apportionment of costs in favour of the respondent in accordance with Article 104(1) EPC is no longer open to reconsideration. Thus the new request of the respondent for an apportionment of costs in this respect has to be refused.