T 1231/20 (NCO system clock/MICROCHIP) 06-11-2023
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MICROCONTROLLER WITH DIGITAL CLOCK SOURCE
Summary of Facts and Submissions
I. The appeal is against the decision by the examining division, dispatched with reasons on 13 January 2020, to refuse European patent application 13799748.2, on the basis that the subject-matter of independent claims 1 and 13 was not inventive, Article 56 EPC.
II. The following documents cited in the appealed decision are referred to in the present decision:
D1: "PIC10(L)F320/322 Data Sheet 6/8-Pin, High-Performance, Flash Microcontrollers", Microchip Technology Inc., 11 July 2011, XP055096949;
D5: US 2008/080648 A1;
E1: Kai Hwang, "Advanced Computer Architecture", McGraw-Hill, 1993, excerpt page 14;
E2: Paul Horowitz and Winfried Hill, "The Art of Electronics", second edition, Cambridge University Press, 1989, excerpt page 759.
The following document was cited by the appellant on 7 May 2020:
E3: Grzegorz Popek, Marian Kampik: "Low-Spur Numerically Controlled Oscillator Using Taylor Series Approximation", XI International PhD Workshop, OWD 2009, 17-20 October 2009.
The following document was introduced by the board:
D6: Wikipedia article, "Numerically controlled oscillator", version of 17 September 2011 at 19:32, URL: https://en.wikipedia.org/w/index.php?title=Numerically_controlled_oscillator&oldid=451019295, retrieved by the board on 15 June 2023.
III. A notice of appeal was received on 20 January 2020, the appeal fee being paid on the same day. A statement of grounds of appeal was received on 7 May 2020.
IV. The appellant requested that the decision under appeal be reversed.
V. The board issued a summons to oral proceedings. In an annex to the summons, the board set out its preliminary opinion on the appeal, according to which the appealed decision would have to be confirmed.
VI. The appellant requests that the decision under appeal be set aside and a patent be granted on the basis of claims 1 to 15 that were the object of the refusal, filed on 28 February 2019, and on the basis of the description pages 1 to 7 and drawings 1 to 3 as published.
VII. Independent claim 1 reads as follows:
"A microcontroller comprising:
a central processing core;
a numerical controlled oscillator (20, 5 100, 200, 310) receiving a primary clock signal (320) and comprising an adder (110) coupled with an accumulator (140) having an overflow output providing an output clock signal;
characterized by
a multiplexer (30; 350) configurable to select the output clock signal of the numerical controlled oscillator (20, 100, 200, 310) as an internal system clock thereby providing a clock for the central processing core of the microcontroller."
VIII. Independent claim 13 relates to a method having method features corresponding to the apparatus features of claim 1.
IX. Oral proceedings were held as scheduled on 6 November 2023. At their end, the chairman announced the board's decision.
Reasons for the Decision
1. The invention
The application relates to a microcontroller comprising an integrated clock control unit (description page 1, lines 8 and 9). More specifically, the microcontroller comprises a central processing core, a numerical controlled oscillator (see figure 1, no. 20; figure 2) receiving a primary clock signal and comprising an adder (110) coupled with an accumulator (140) having an overflow output providing an output clock signal (preamble of claim 1).
The application observes (page 1, line 11) that most microcontroller clock schemes are based on binary dividers of a standard clock. The application aims to provide a microcontroller with a more flexible configurability of a digital clock source that can be used as a system clock or as a clock source for peripheral devices or other uses (page 1, lines 20 to 22).
In order to achieve this aim, the microcontroller further comprises a multiplexer (figure 1, no. 30) configurable to select the output clock signal of the numerical controlled oscillator as an internal system clock, thereby providing a clock for the central processing core of the microcontroller (characterising part of claim 1).
2. Interpretation of claims
The appellant confirmed during the oral proceedings that the term "numerical controlled oscillator" is not intended to signify anything different than the term "numerically controlled oscillator" used in the prior art.
3. Inventive step; Article 56 EPC
3.1 As far as claim 1 is concerned, the board is of the opinion that D5, which discloses a microcontroller comprising a central processing core and an oscillator, constitutes a suitable starting point for an inventive step analysis.
3.2 D5 further discloses a multiplexer configurable to select the output clock signal of internal or external oscillators as an internal signal clock, providing a clock for the central processing core of the microcontroller (multiplexer 142 in D5, figure 7).
3.3 According to the appealed decision (point 2.1), the oscillator 712 in D5 is a numerical controlled oscillator. The decision refers to D5, figures 7 and 8 and par. [0039]. According to that paragraph, oscillator 712 is a programmable precision trimmable oscillator which is controlled by registers 818 and 820, which set its frequency and enable it.
According to the board, par. [0039] of D5 does imply that the oscillator 712 is an oscillator with a frequency that can be trimmed by digital means (7 bits in register 818; see par. [0040]). However, it does not imply that the oscillator is a numerically controlled oscillator (NCO).
Indeed, according to its common definition, an NCO is a digital signal generator, generating a pulsed raw output in its most basic form (see for instance D1, section 20.1, first paragraph, or D6, page 1, last paragraph, first sentence), or digital samples of a waveform, e.g. a sinusoid, if it further includes a phase-to-amplitude converter (see for instance first paragraph of D6 and E3).
3.4 On the other hand, the board is not convinced by the appellant's argument (statement of grounds of appeal, pages 5 and 6) that an NCO would not be considered for use as a clock source for a CPU in a microcontroller.
The board acknowledges that the documents E1 and E2 cited by the appellant, which were published in or before 1993, show oscillators recommended for use as a clock source for a CPU which had in common that the system clock provided by those oscillators had a constant cycle time; see E1 (section entitled "Clock Rate and CPI") and figure 11.4 referred to in E2 (figure 11.4 being on page 754 in the book of which E2 is a part).
In the meantime, however, and already before the priority date of the present application, NCO's had evolved as a possible alternative to analog oscillators. They have since become cheaper and have become easier to integrate. It was also well known already before the priority date of the application that NCO's provide numerous advantages compared to analog oscillators: they are more agile, accurate, stable and reliable (see e.g. D6, second paragraph, first sentence). In addition, a general trend exists to use digital instead of analog components.
For this reason, the skilled person, who has a natural tendency to consider alternative designs which can provide an advantage in specific circumstances, would have an incentive to consider the use of an NCO as an oscillator in a microprocessor comprising a central processing core.
The board observes in this respect that this would remain true even if a constant cycle time were required as argued by the appellant. One would then simply leave the "increment value" (term used in D1) or "frequency control word" (term used in D6) constant.
3.5 An NCO would comprise an adder coupled with an accumulator having an overflow output providing an output clock signal (see D6, figure 1 and D1, section 20.1, first sentence).
3.6 A skilled person would thus arrive at the subject-matter of claim 1 without demonstrating any inventive activity.
3.7 During the oral proceedings, the appellant did not specifically question the board's analysis that NCOs were known in the prior art to have the mentioned advantages or that the skilled person would, in order to achieve these advantages, consider the modification of the microcontroller disclosed in D5 by using an NCO as disclosed in D6.
However, the appellant defended the point of view that the problem of making these advantages available to the microcontroller disclosed in D5 was an inappropriate objective technical problem to be considered, given the fact that the description of the present application on page 5, lines 16 to 18, sets out a different problem addressed by the invention, viz. to fill in the gap between the binary-multiple frequency increases which can be achieved with analog oscillators.
This argument could not sway the board's opinion. Once a convincing argument is made why the claimed invention would have been obvious to the skilled person having regard to the state of the art (Article 56 EPC), the claimed invention will no longer be considered as involving an inventive step. More specifically, if the claimed invention is found to be an obvious solution to an objective technical problem which can be assumed to have arisen - as is the case here, namely to make available the advantages of a replacement component in a piece of prior art - the identification of an alternative technical problem as a solution to which the claimed invention might not appear to be obvious does not suffice to invalidate the finding of obviousness. Especially the fact that the alternative technical problem is the one addressed in the application, i.e. the "subjective" technical problem, is insufficient to establish an inventive step.
3.8 The board consequently holds that the subject-matter of claim 1 is not inventive (Article 56 EPC).
Order
For these reasons it is decided that:
The appeal is dismissed.